BMC/Intel-BMC/linux.git/arch/powerpc/kernel/align.c, branch dev-4.7

powerpc: Create disable_kernel_{fp,altivec,vsx,spe}()

2015-12-01T02:52:25+00:00

The enable_kernel_*() functions leave the relevant MSR bits enabled until we exit the kernel sometime later. Create disable versions that wrap the kernel use of FP, Altivec VSX or SPE. While we don't want to disable it normally for performance reasons (MSR writes are slow), it will be used for a debug boot option that does this and catches bad uses in other areas of the kernel. Signed-off-by: Anton Blanchard Signed-off-by: Michael Ellerman

powerpc: Remove double braces in alignment code.

2014-11-09T22:59:32+00:00

Looks like I introduced this when adding LE support. Signed-off-by: Anton Blanchard Signed-off-by: Michael Ellerman

KVM: PPC: BOOK3S: Remove open coded make_dsisr in alignment handler

2014-05-30T12:26:25+00:00

Use make_dsisr instead of open coding it. This also have the added benefit of handling alignment interrupt on additional instructions. Signed-off-by: Aneesh Kumar K.V Signed-off-by: Alexander Graf

powerpc: Add lq/stq emulation

2014-04-09T02:53:28+00:00

Recent CPUs support quad word load and store instructions. Add support to the alignment handler for them. Signed-off-by: Anton Blanchard Signed-off-by: Benjamin Herrenschmidt

powerpc: Enable Little Endian Alignment Handler for Float Pair Instructions

2013-10-30T05:01:23+00:00

This patch enables alignment handling for the load/store floating point pair instructions (lfdp, lfdpx, stfdp, stfdpx). The handler routine is properly coded and only needs to be enabled. Signed-off-by: Tom Musta Signed-off-by: Benjamin Herrenschmidt

powerpc: Fix Handler of Unaligned Load/Store Strings

2013-10-30T05:01:17+00:00

The alignment handler is incorrect for unaligned string instructions in little endian mode. These instructions access data as arrays of bytes and thus are endian neutral. However, the routine also handles the load/store multiple instructions, which are NOT endian neutral. This patch toggles the byte swapping flag for the string instructions in little endian builds. This effectively disables the byte swapping logic. Signed-off-by: Tom Musta Signed-off-by: Benjamin Herrenschmidt

Merge branch 'for-kvm' into next

2013-10-11T07:23:53+00:00

Topic branch for commits that the KVM tree might want to pull in separately. Hand merged a few files due to conflicts with the LE stuff Signed-off-by: Benjamin Herrenschmidt

powerpc: Put FP/VSX and VR state into structures

2013-10-11T06:26:49+00:00

This creates new 'thread_fp_state' and 'thread_vr_state' structures to store FP/VSX state (including FPSCR) and Altivec/VSX state (including VSCR), and uses them in the thread_struct. In the thread_fp_state, the FPRs and VSRs are represented as u64 rather than double, since we rarely perform floating-point computations on the values, and this will enable the structures to be used in KVM code as well. Similarly FPSCR is now a u64 rather than a structure of two 32-bit values. This takes the offsets out of the macros such as SAVE_32FPRS, REST_32FPRS, etc. This enables the same macros to be used for normal and transactional state, enabling us to delete the transactional versions of the macros. This also removes the unused do_load_up_fpu and do_load_up_altivec, which were in fact buggy since they didn't create large enough stack frames to account for the fact that load_up_fpu and load_up_altivec are not designed to be called from C and assume that their caller's stack frame is an interrupt frame. Signed-off-by: Paul Mackerras Signed-off-by: Benjamin Herrenschmidt

powerpc: Handle VSX alignment faults in little endian mode

2013-10-11T05:48:38+00:00

Things are complicated by the fact that VSX elements are big endian ordered even in little endian mode. 8 byte loads and stores also write to the top 8 bytes of the register. Signed-off-by: Anton Blanchard Signed-off-by: Benjamin Herrenschmidt

powerpc: Add little endian support to alignment handler

2013-10-11T05:48:37+00:00

Handle most unaligned load and store faults in little endian mode. Strings, multiples and VSX are not supported. Signed-off-by: Anton Blanchard Signed-off-by: Benjamin Herrenschmidt