Intel OpenBMC Linux kernel source tree (mirror) https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev 2013-08-07T23:38:04+00:00 2013-08-07T23:38:04+00:00 Priyanka Jain Priyanka.Jain@freescale.com 2013-06-05T20:22:10+00:00 urn:sha1:3c83658ca989962eed6cd6639ff6c5eeb1ba1e3c e6500 core performance monitors has the following features: - 6 performance monitor counters - 512 events supported - no threshold events e6500 PMU has more specific events (Data L1 cache misses, Instruction L1 cache misses, etc ) than e500 PMU (which only had Data L1 cache reloads, etc). Where available, the more specific events have been used which will produce slightly different results than e500 PMU equivalents. Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Signed-off-by: Lijun Pan <Lijun.Pan@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com> 2013-08-07T23:38:03+00:00 Lijun Pan LIJUN.PAN@FREESCALE.COM 2013-06-05T20:22:09+00:00 urn:sha1:5815c434fdb87b9e2f7d2268d29534e8b0011439 There are 6 counters in e6500 core instead of 4 in e500 core. Signed-off-by: Lijun Pan <Lijun.Pan@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com> 2013-08-07T23:38:03+00:00 Lijun Pan LIJUN.PAN@FREESCALE.COM 2013-06-05T20:01:32+00:00 urn:sha1:a9a5cda06922545ed7540cf5ed7e5ad6b80851d9 Signed-off-by: Lijun Pan <Lijun.Pan@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com> 2010-03-05T09:04:08+00:00 Scott Wood scottwood@freescale.com 2010-02-26T00:09:45+00:00 urn:sha1:a11106544f33c104706ae42d27219a409b67478e This implements perf_event support for the Freescale embedded performance monitor, based on the existing perf_event.c that supports server/classic chips. Some limitations: - Performance monitor interrupts are regular EE interrupts, and thus you can't profile places with interrupts disabled. We may want to implement soft IRQ-disabling, with perfmon interrupts exempted and treated as NMIs. - When trying to schedule multiple event groups at once, and using restricted events, situations could arise where scheduling fails even though it would be possible. Consider three groups, each with two events. One group has restricted events, the others don't. The two non-restricted groups are scheduled, then one is removed, which happens to occupy the two counters that can't do restricted events. The remaining non-restricted group will not be moved to the non-restricted-capable counters to make room if the restricted group tries to be scheduled. Signed-off-by: Scott Wood <scottwood@freescale.com> Acked-by: Paul Mackerras <paulus@samba.org> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> 2009-12-04T14:39:55+00:00 André Goddard Rosa andre.goddard@gmail.com 2009-11-14T15:09:05+00:00 urn:sha1:af901ca181d92aac3a7dc265144a9081a86d8f39 That is "success", "unknown", "through", "performance", "[re|un]mapping" , "access", "default", "reasonable", "[con]currently", "temperature" , "channel", "[un]used", "application", "example","hierarchy", "therefore" , "[over|under]flow", "contiguous", "threshold", "enough" and others. Signed-off-by: André Goddard Rosa <andre.goddard@gmail.com> Signed-off-by: Jiri Kosina <jkosina@suse.cz> 2008-08-04T02:02:00+00:00 Stephen Rothwell sfr@canb.auug.org.au 2008-08-01T05:20:30+00:00 urn:sha1:b8b572e1015f81b4e748417be2629dfe51ab99f9 from include/asm-powerpc. This is the result of a mkdir arch/powerpc/include/asm git mv include/asm-powerpc/* arch/powerpc/include/asm Followed by a few documentation/comment fixups and a couple of places where <asm-powepc/...> was being used explicitly. Of the latter only one was outside the arch code and it is a driver only built for powerpc. Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Paul Mackerras <paulus@samba.org>