<feed xmlns='http://www.w3.org/2005/Atom'>
<title>BMC/Intel-BMC/linux.git/arch/powerpc/Makefile, branch dev-4.17</title>
<subtitle>Intel OpenBMC Linux kernel source tree (mirror)</subtitle>
<id>https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev-4.17</id>
<link rel='self' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev-4.17'/>
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<updated>2018-07-03T09:26:51+00:00</updated>
<entry>
<title>powerpc/e500mc: Set assembler machine type to e500mc</title>
<updated>2018-07-03T09:26:51+00:00</updated>
<author>
<name>Michael Jeanson</name>
<email>mjeanson@efficios.com</email>
</author>
<published>2018-06-14T15:27:42+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=8108d537b4436dda926518b0a9385ab896031b73'/>
<id>urn:sha1:8108d537b4436dda926518b0a9385ab896031b73</id>
<content type='text'>
commit 69a8405999aa1c489de4b8d349468f0c2b83f093 upstream.

In binutils 2.26 a new opcode for the "wait" instruction was added for the
POWER9 and has precedence over the one specific to the e500mc. Commit
ebf714ff3756 ("powerpc/e500mc: Add support for the wait instruction in
e500_idle") uses this instruction specifically on the e500mc to work around
an erratum.

This results in an invalid instruction in idle_e500 when we build for the
e500mc on bintutils &gt;= 2.26 with the default assembler machine type.

Since multiplatform between e500 and non-e500 is not supported, set the
assembler machine type globaly when CONFIG_PPC_E500MC=y.

Signed-off-by: Michael Jeanson &lt;mjeanson@efficios.com&gt;
Reviewed-by: Mathieu Desnoyers &lt;mathieu.desnoyers@efficios.com&gt;
CC: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
CC: Paul Mackerras &lt;paulus@samba.org&gt;
CC: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
CC: Kumar Gala &lt;galak@kernel.crashing.org&gt;
CC: Vakul Garg &lt;vakul.garg@nxp.com&gt;
CC: Scott Wood &lt;swood@redhat.com&gt;
CC: Mathieu Desnoyers &lt;mathieu.desnoyers@efficios.com&gt;
CC: linuxppc-dev@lists.ozlabs.org
CC: linux-kernel@vger.kernel.org
CC: stable@vger.kernel.org
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>powerpc/64s: Add POWER9 CPU type selection</title>
<updated>2018-04-01T12:15:32+00:00</updated>
<author>
<name>Nicholas Piggin</name>
<email>npiggin@gmail.com</email>
</author>
<published>2018-02-20T19:08:32+00:00</published>
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<id>urn:sha1:4b7e5532d2113d002aa54bfe581f35b3f1f72306</id>
<content type='text'>
Signed-off-by: Nicholas Piggin &lt;npiggin@gmail.com&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
</content>
</entry>
<entry>
<title>powerpc/64: Add GENERIC_CPU support for little endian</title>
<updated>2018-04-01T11:52:52+00:00</updated>
<author>
<name>Nicholas Piggin</name>
<email>npiggin@gmail.com</email>
</author>
<published>2018-02-20T19:08:30+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=a73657ea19aeb92f98438263d42f90188f115d58'/>
<id>urn:sha1:a73657ea19aeb92f98438263d42f90188f115d58</id>
<content type='text'>
Add GENERIC_CPU support for little-endian rather than using POWER8
specific selection for POWER9 and above.

Restrict GENERIC_CPU to POWER8 and above on little endian.

Signed-off-by: Nicholas Piggin &lt;npiggin@gmail.com&gt;
[mpe: Duplicate GENERIC_CPU to avoid a kbuild warning about the prompt
      being redefined. Spell out that GENERIC means &gt;= POWER4 for BE.]
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
</content>
</entry>
<entry>
<title>powerpc/64s: Remove POWER4 support</title>
<updated>2018-03-31T13:47:50+00:00</updated>
<author>
<name>Nicholas Piggin</name>
<email>npiggin@gmail.com</email>
</author>
<published>2018-02-20T19:08:29+00:00</published>
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<id>urn:sha1:471d7ff8b51b63521c8ea35c51966ab4caa434ee</id>
<content type='text'>
POWER4 has been broken since at least the change 49d09bf2a6
("powerpc/64s: Optimise MSR handling in exception handling"), which
requires mtmsrd L=1 support. This was introduced in ISA v2.01, and
POWER4 supports ISA v2.00.

Signed-off-by: Nicholas Piggin &lt;npiggin@gmail.com&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
</content>
</entry>
<entry>
<title>powerpc/64s: Set assembler machine type to POWER4</title>
<updated>2018-03-31T13:47:49+00:00</updated>
<author>
<name>Nicholas Piggin</name>
<email>npiggin@gmail.com</email>
</author>
<published>2018-02-20T19:08:26+00:00</published>
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<id>urn:sha1:15a3204d24a3c01b116fb7c0692b7c670cac631d</id>
<content type='text'>
Rather than override the machine type in .S code (which can hide wrong
or ambiguous code generation for the target), set the type to power4
for all assembly.

This also means we need to be careful not to build power4-only code
when we're not building for Book3S, such as the "power7" versions of
copyuser/page/memcpy.

Signed-off-by: Nicholas Piggin &lt;npiggin@gmail.com&gt;
[mpe: Fix Book3E build, don't build the "power7" variants for non-Book3S]
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
</content>
</entry>
<entry>
<title>powerpc: Keep const vars out of writable .sdata</title>
<updated>2018-03-05T22:21:21+00:00</updated>
<author>
<name>Segher Boessenkool</name>
<email>segher@kernel.crashing.org</email>
</author>
<published>2018-03-01T01:02:49+00:00</published>
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<id>urn:sha1:51d42f0f5fd6c74144d19bf6a663521e2ea99765</id>
<content type='text'>
Newer gcc will support "-mno-readonly-in-sdata"[1], which makes sure that
the optimization on PPC32 for variables getting moved into the .sdata
section will not apply to const variables (which must be in .rodata).

This was originally noticed in mm/rodata_test.c when rodata_test_data
was not static:

c0695034 g     O .data	00000004 rodata_test_data

After this patch with an updated compiler, this is correctly in .rodata.

[1] https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82411

Reported-by: Christophe Leroy &lt;christophe.leroy@c-s.fr&gt;
Signed-off-by: Segher Boessenkool &lt;segher@kernel.crashing.org&gt;
Signed-off-by: Kees Cook &lt;keescook@chromium.org&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
</content>
</entry>
<entry>
<title>powerpc/modules: Fix alignment of .toc section in kernel modules</title>
<updated>2017-12-11T02:03:35+00:00</updated>
<author>
<name>Alan Modra</name>
<email>amodra@gmail.com</email>
</author>
<published>2017-12-06T19:12:28+00:00</published>
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<id>urn:sha1:5c45b5280196a92c4437f5648209c5bd3f08e882</id>
<content type='text'>
powerpc64 gcc can generate code that offsets an address, to access
part of an object in memory. If the address is a -mcmodel=medium toc
pointer relative address then code like the following is possible.

  addis r9,r2,var@toc@ha
  ld r3,var@toc@l(r9)
  ld r4,(var+8)@toc@l(r9)

This works fine so long as var is naturally aligned, *and* r2 is
sufficiently aligned. If not, there is a possibility that the offset
added to access var+8 wraps over a n*64k+32k boundary. Modules don't
have any guarantee that r2 is sufficiently aligned. Moreover, code
generated by older compilers generates a .toc section with 2**0
alignment, which can result in relocation failures at module load time
even without the wrap problem.

Thus, this patch links modules with an aligned .toc section (Makefile
and module.lds changes), and forces alignment for out of tree modules
or those without a .toc section (module_64.c changes).

Signed-off-by: Alan Modra &lt;amodra@gmail.com&gt;
[desnesn: updated patch to apply to powerpc-next kernel v4.15 ]
Signed-off-by: Desnes A. Nunes do Rosario &lt;desnesn@linux.vnet.ibm.com&gt;
[mpe: Fix out-of-tree build, swap -256 for ~0xff, reflow comment]
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
</content>
</entry>
<entry>
<title>Merge branch 'fixes' into next</title>
<updated>2017-08-23T12:20:10+00:00</updated>
<author>
<name>Michael Ellerman</name>
<email>mpe@ellerman.id.au</email>
</author>
<published>2017-08-23T12:20:10+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=15c659ff9d5b367c886166a9854a89b72c524a68'/>
<id>urn:sha1:15c659ff9d5b367c886166a9854a89b72c524a68</id>
<content type='text'>
There's a non-trivial dependency between some commits we want to put in
next and the KVM prefetch work around that went into fixes. So merge
fixes into next.
</content>
</entry>
<entry>
<title>powerpc/8xx: Getting rid of remaining use of CONFIG_8xx</title>
<updated>2017-08-10T13:32:12+00:00</updated>
<author>
<name>Christophe Leroy</name>
<email>christophe.leroy@c-s.fr</email>
</author>
<published>2017-08-08T11:58:54+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=968159c0031ac1e07ab4426397e786c9c483f068'/>
<id>urn:sha1:968159c0031ac1e07ab4426397e786c9c483f068</id>
<content type='text'>
Two config options exist to define powerpc MPC8xx:
* CONFIG_PPC_8xx
* CONFIG_8xx

arch/powerpc/platforms/Kconfig.cputype has contained the following
comment about CONFIG_8xx item for some years:
"# this is temp to handle compat with arch=ppc"

arch/powerpc is now the only place with remaining use of
CONFIG_8xx: get rid of them.

Signed-off-by: Christophe Leroy &lt;christophe.leroy@c-s.fr&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
</content>
</entry>
<entry>
<title>powerpc/configs: Add a powernv_be_defconfig</title>
<updated>2017-07-31T06:56:37+00:00</updated>
<author>
<name>Michael Ellerman</name>
<email>mpe@ellerman.id.au</email>
</author>
<published>2017-07-24T12:50:45+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=3603c52f02ee3ad536e4cd08ac08e9c0c4d0c7eb'/>
<id>urn:sha1:3603c52f02ee3ad536e4cd08ac08e9c0c4d0c7eb</id>
<content type='text'>
Although pretty much everyone using powernv is running little endian,
we should still test we can build for big endian. So add a
powernv_be_defconfig, which is autogenerated by flipping the endian
symbol in powernv_defconfig.

Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Reviewed-by: Cyril Bur &lt;cyrilbur@gmail.com&gt;
</content>
</entry>
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