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<title>BMC/Intel-BMC/linux.git/arch/parisc/include/asm/ldcw.h, branch dev</title>
<subtitle>Intel OpenBMC Linux kernel source tree (mirror)</subtitle>
<id>https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev</id>
<link rel='self' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/'/>
<updated>2014-12-26T16:47:01+00:00</updated>
<entry>
<title>parisc: fix out-of-register compiler error in ldcw inline assembler function</title>
<updated>2014-12-26T16:47:01+00:00</updated>
<author>
<name>John David Anglin</name>
<email>dave.anglin@bell.net</email>
</author>
<published>2014-12-14T15:49:11+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=45db07382a5c78b0c43b3b0002b63757fb60e873'/>
<id>urn:sha1:45db07382a5c78b0c43b3b0002b63757fb60e873</id>
<content type='text'>
The __ldcw macro has a problem when its argument needs to be reloaded from
memory. The output memory operand and the input register operand both need to
be reloaded using a register in class R1_REGS when generating 64-bit code.
This fails because there's only a single register in the class. Instead, use a
memory clobber. This also makes the __ldcw macro a compiler memory barrier.

Signed-off-by: John David Anglin &lt;dave.anglin@bell.net&gt;
Cc: &lt;stable@vger.kernel.org&gt;        [3.13+]
Signed-off-by: Helge Deller &lt;deller@gmx.de&gt;
</content>
</entry>
<entry>
<title>Disintegrate asm/system.h for PA-RISC</title>
<updated>2012-03-28T17:30:02+00:00</updated>
<author>
<name>David Howells</name>
<email>dhowells@redhat.com</email>
</author>
<published>2012-03-28T17:30:02+00:00</published>
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<id>urn:sha1:527dcdccd60759ee38e6224c93f87a6194d970ad</id>
<content type='text'>
Disintegrate asm/system.h for PA-RISC.

Signed-off-by: David Howells &lt;dhowells@redhat.com&gt;
cc: linux-parisc@vger.kernel.org
</content>
</entry>
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