BMC/Intel-BMC/linux.git/arch/mips/netlogic/xlr/setup.c, branch dev

Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus

2014-01-31T01:20:32+00:00

Pull MIPS updates from Ralf Baechle: "The most notable new addition inside this pull request is the support for MIPS's latest and greatest core called "inter/proAptiv". The patch series describes this core as follows. "The interAptiv is a power-efficient multi-core microprocessor for use in system-on-chip (SoC) applications. The interAptiv combines a multi-threading pipeline with a coherence manager to deliver improved computational throughput and power efficiency. The interAptiv can contain one to four MIPS32R3 interAptiv cores, system level coherence manager with L2 cache, optional coherent I/O port, and optional floating point unit." The platform specific patches touch all 3 Broadcom families. It adds support for the new Broadcom/Netlogix XLP9xx Soc, building a common BCM63XX SMP kernel for all BCM63XX SoCs regardless of core type/count and full gpio button/led descriptions for BCM47xx. The rest of the series are cleanups and bug fixes that are MIPS generic and consist largely of changes that Imgtec/MIPS had published in their linux-mti-3.10.git stable tree. Random other cleanups and patches preparing code to be merged in 3.15" * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (139 commits) mips: select ARCH_MIGHT_HAVE_PC_SERIO mips: delete non-required instances of include MIPS: KVM: remove shadow_tlb code MIPS: KVM: use common EHINV aware UNIQUE_ENTRYHI mips/ide: flush dcache also if icache does not snoop dcache MIPS: BCM47XX: fix position of cpu_wait disabling MIPS: BCM63XX: select correct MIPS_L1_CACHE_SHIFT value MIPS: update MIPS_L1_CACHE_SHIFT based on MIPS_L1_CACHE_SHIFT_ MIPS: introduce MIPS_L1_CACHE_SHIFT_ MIPS: ZBOOT: gather string functions into string.c arch/mips/pci: don't check resource with devm_ioremap_resource arch/mips/lantiq/xway: don't check resource with devm_ioremap_resource bcma: gpio: don't cast u32 to unsigned long ssb: gpio: add own IRQ domain MIPS: BCM47XX: fix sparse warnings in board.c MIPS: BCM47XX: add board detection for Linksys WRT54GS V1 MIPS: BCM47XX: fix detection for some boards MIPS: BCM47XX: Enable buttons support on SSB MIPS: BCM47XX: Convert WNDR4500 to new syntax MIPS: BCM47XX: Use "timer" trigger for status LEDs ...

MIPS: Netlogic: Remove XLR early serial setup

2014-01-24T21:39:50+00:00

The early serial code is not needed because we already have early printk support provided by common/earlycons.c This change also fixes the following build error that occurs when CONFIG_SERIAL_8250 is not configured for Netlogic XLR boards: arch/mips/built-in.o: In function `nlm_early_serial_setup': setup.c:(.init.text+0x274): undefined reference to `early_serial_setup' make: *** [vmlinux] Error 1 Reported-by: Markos Chandras Signed-off-by: Jayachandran C Signed-off-by: John Crispin Patchwork: http://patchwork.linux-mips.org/patch/6083/

MIPS: Remove panic_timeout settings

2013-11-26T11:12:27+00:00

Now that we have a CONFIG_PANIC_TIMEOUT=x setting, remove the mips settings. The default is 0, which means don't reboot on panic. Signed-off-by: Ralf Baechle Acked-by: Shinya Kuribayashi Signed-off-by: Jason Baron Cc: benh@kernel.crashing.org Cc: paulus@samba.org Cc: mpe@ellerman.id.au Cc: felipe.contreras@gmail.com Cc: linux-mips@linux-mips.org Cc: Linus Torvalds Cc: Andrew Morton Cc: Peter Zijlstra Cc: Thomas Gleixner Link: http://lkml.kernel.org/r/d19dc75fca343ec5d9ada75a1400f57330021976.1385418410.git.jbaron@akamai.com Signed-off-by: Ingo Molnar

MIPS: Netlogic: move cpu_ready array to boot area

2013-06-13T15:46:42+00:00

Move the nlm_cpu_ready[] array used by the cpu wakeup code to the boot area, along with rest of the boot parameter code. Signed-off-by: Jayachandran C Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5425/ Signed-off-by: Ralf Baechle

MIPS: Netlogic: Initialization when !CONFIG_SMP

2013-06-13T15:46:42+00:00

The core initialization and reset vector setup needs to be done even when booting uniprocessor. Move this code from smp.c to setup.c Signed-off-by: Jayachandran C Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5428/ Signed-off-by: Ralf Baechle

MIPS: Idle: Consolidate all declarations in .

2013-05-21T23:34:27+00:00

Signed-off-by: Ralf Baechle

Merge branch 'mips-next-3.9' of git://git.linux-mips.org/pub/scm/john/linux-john into mips-for-linux-next

2013-02-21T11:51:33+00:00

MIPS: Netlogic: Use PIC timer as a clocksource

2013-02-16T23:15:20+00:00

The XLR/XLS/XLP PIC has a 8 countdown timers which run at the PIC frequencey. One of these can be used as a clocksource to provide timestamps that is common across cores. This can be used in place of the count/compare clocksource which is per-CPU. On XLR/XLS PIC registers are 32-bit, so we just use the lower 32-bits of the PIC counter. On XLP, the whole 64-bit can be used. Provide common macros and functions for PIC timer registers on XLR/XLS and XLP, and use them to register a PIC clocksource. Signed-off-by: Jayachandran C Patchwork: http://patchwork.linux-mips.org/patch/4786/ Signed-off-by: John Crispin

MIPS: Whitespace cleanup.

2013-02-01T09:00:22+00:00

Having received another series of whitespace patches I decided to do this once and for all rather than dealing with this kind of patches trickling in forever. Signed-off-by: Ralf Baechle

MIPS: Netlogic: Fix UP compilation on XLR

2013-01-30T20:44:18+00:00

The commit 2a37b1a "MIPS: Netlogic: Move from u32 cpumask to cpumask_t" breaks uniprocessor compilation on XLR with: arch/mips/netlogic/xlr/setup.c: In function 'prom_init': arch/mips/netlogic/xlr/setup.c:196:6: error: unused variable 'i' Fix by defining 'i' only when CONFIG_SMP is defined. Signed-off-by: Jayachandran C Patchwork: http://patchwork.linux-mips.org/patch/4760/ Signed-off-by: John Crispin Signed-off-by: Ralf Baechle