<feed xmlns='http://www.w3.org/2005/Atom'>
<title>BMC/Intel-BMC/linux.git/arch/mips/kernel/smp-cps.c, branch dev</title>
<subtitle>Intel OpenBMC Linux kernel source tree (mirror)</subtitle>
<id>https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev</id>
<link rel='self' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev'/>
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<updated>2015-07-09T09:12:57+00:00</updated>
<entry>
<title>MIPS: kernel: smp-cps: Fix 64-bit compatibility errors due to pointer casting</title>
<updated>2015-07-09T09:12:57+00:00</updated>
<author>
<name>Markos Chandras</name>
<email>markos.chandras@imgtec.com</email>
</author>
<published>2015-07-01T08:13:28+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=fd5ed3066bb2f47814fe53cdc56d11a678551ae1'/>
<id>urn:sha1:fd5ed3066bb2f47814fe53cdc56d11a678551ae1</id>
<content type='text'>
Commit 1d8f1f5a780a ("MIPS: smp-cps: hotplug support") added hotplug
support in the SMP/CPS implementation but it introduced a few build problems
on 64-bit kernels due to pointer being casted to and from 'int' C types. We
fix this problem by using 'unsigned long' instead which should match the size
of the pointers in 32/64-bit kernels. Finally, we fix the comment since the
CM base address is loaded to v1($3) instead of v0.

Fixes the following build problems:

arch/mips/kernel/smp-cps.c: In function 'wait_for_sibling_halt':
arch/mips/kernel/smp-cps.c:366:17: error: cast from pointer to integer of
different size [-Werror=pointer-to-int-cast]
[...]
arch/mips/kernel/smp-cps.c: In function 'cps_cpu_die':
arch/mips/kernel/smp-cps.c:427:13: error: cast to pointer
from integer of different size [-Werror=int-to-pointer-cast]

cc1: all warnings being treated as errors

Fixes: 1d8f1f5a780a ("MIPS: smp-cps: hotplug support")
Cc: &lt;stable@vger.kernel.org&gt; # 3.16+
Reviewed-by: Paul Burton &lt;paul.burton@imgtec.com&gt;
Signed-off-by: Markos Chandras &lt;markos.chandras@imgtec.com&gt;
Cc: linux-mips@linux-mips.org
Cc: stable@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/10586/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: Fix up obsolete cpu_set usage</title>
<updated>2015-05-15T20:02:48+00:00</updated>
<author>
<name>Ezequiel Garcia</name>
<email>ezequiel.garcia@imgtec.com</email>
</author>
<published>2015-04-28T21:34:23+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=7363cb7de3999e84243bca79ffea257fd86a2cc6'/>
<id>urn:sha1:7363cb7de3999e84243bca79ffea257fd86a2cc6</id>
<content type='text'>
cpu_set was removed (along with a bunch of cpumask helpers) by
commit 2f0f267ea072 ("cpumask: remove deprecated functions.").

Fix this by replacing cpu_set with cpumask_set_cpu. Without this
fix the following error is triggered when CONFIG_MIPS_MT_FPAFF=y.

  arch/mips/kernel/smp-cps.c: In function 'cps_smp_setup':
  arch/mips/kernel/smp-cps.c:95:3: error: implicit declaration of function 'cpu_set' [-Werror=implicit-function-declaration]

Fixes: 90db024f140d ("MIPS: smp-cps: cpu_set FPU mask if FPU present")
Signed-off-by: Ezequiel Garcia &lt;ezequiel.garcia@imgtec.com&gt;
Acked-by: Niklas Cassel &lt;niklass@axis.com&gt;
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/9912/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>Merge tag 'cpumask-next-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/rusty/linux</title>
<updated>2015-04-20T17:19:03+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2015-04-20T17:19:03+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=6496edfce95f943e1da43631c2f437509e56af7f'/>
<id>urn:sha1:6496edfce95f943e1da43631c2f437509e56af7f</id>
<content type='text'>
Pull final removal of deprecated cpus_* cpumask functions from Rusty Russell:
 "This is the final removal (after several years!) of the obsolete
  cpus_* functions, prompted by their mis-use in staging.

  With these function removed, all cpu functions should only iterate to
  nr_cpu_ids, so we finally only allocate that many bits when cpumasks
  are allocated offstack"

* tag 'cpumask-next-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/rusty/linux: (25 commits)
  cpumask: remove __first_cpu / __next_cpu
  cpumask: resurrect CPU_MASK_CPU0
  linux/cpumask.h: add typechecking to cpumask_test_cpu
  cpumask: only allocate nr_cpumask_bits.
  Fix weird uses of num_online_cpus().
  cpumask: remove deprecated functions.
  mips: fix obsolete cpumask_of_cpu usage.
  x86: fix more deprecated cpu function usage.
  ia64: remove deprecated cpus_ usage.
  powerpc: fix deprecated CPU_MASK_CPU0 usage.
  CPU_MASK_ALL/CPU_MASK_NONE: remove from deprecated region.
  staging/lustre/o2iblnd: Don't use cpus_weight
  staging/lustre/libcfs: replace deprecated cpus_ calls with cpumask_
  staging/lustre/ptlrpc: Do not use deprecated cpus_* functions
  blackfin: fix up obsolete cpu function usage.
  parisc: fix up obsolete cpu function usage.
  tile: fix up obsolete cpu function usage.
  arm64: fix up obsolete cpu function usage.
  mips: fix up obsolete cpu function usage.
  x86: fix up obsolete cpu function usage.
  ...
</content>
</entry>
<entry>
<title>MIPS: smp-cps: cpu_set FPU mask if FPU present</title>
<updated>2015-04-10T13:41:52+00:00</updated>
<author>
<name>Niklas Cassel</name>
<email>niklas.cassel@axis.com</email>
</author>
<published>2015-01-15T15:41:13+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=90db024f140d0d6ad960cc5f090e3c8ed890ca55'/>
<id>urn:sha1:90db024f140d0d6ad960cc5f090e3c8ed890ca55</id>
<content type='text'>
If we have an FPU, enroll ourselves in the FPU-full mask.
Matching the MT_SMP and CMP implementations of smp_setup.

Signed-off-by: Niklas Cassel &lt;niklass@axis.com&gt;
Cc: paul.burton@imgtec.com
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8948/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>mips: fix up obsolete cpu function usage.</title>
<updated>2015-03-05T04:55:06+00:00</updated>
<author>
<name>Rusty Russell</name>
<email>rusty@rustcorp.com.au</email>
</author>
<published>2015-03-05T00:19:17+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=8dd928915a73bf95a727a46037964243eb1e042c'/>
<id>urn:sha1:8dd928915a73bf95a727a46037964243eb1e042c</id>
<content type='text'>
Thanks to spatch, plus manual removal of "&amp;*".  Then a sweep for
for_each_cpu_mask =&gt; for_each_cpu.

Signed-off-by: Rusty Russell &lt;rusty@rustcorp.com.au&gt;
Cc: Ralf Baechle &lt;ralf@linux-mips.org&gt;
Cc: Kevin Cernekee &lt;cernekee@gmail.com&gt;
Cc: Florian Fainelli &lt;f.fainelli@gmail.com&gt;
Cc: linux-mips@linux-mips.org
</content>
</entry>
<entry>
<title>MIPS: Move gic.h to include/linux/irqchip/mips-gic.h</title>
<updated>2014-11-24T06:44:59+00:00</updated>
<author>
<name>Andrew Bresticker</name>
<email>abrestic@chromium.org</email>
</author>
<published>2014-10-20T19:03:53+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=4060bbe9931eca2ed3c2124022a070a75d507472'/>
<id>urn:sha1:4060bbe9931eca2ed3c2124022a070a75d507472</id>
<content type='text'>
Now that the MIPS GIC irqchip lives in drivers/irqchip/, move
its header over to include/linux/irqchip/.

Signed-off-by: Andrew Bresticker &lt;abrestic@chromium.org&gt;
Cc: Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: Jason Cooper &lt;jason@lakedaemon.net&gt;
Cc: Paul Burton &lt;paul.burton@imgtec.com&gt;
Cc: Qais Yousef &lt;qais.yousef@imgtec.com&gt;
Cc: John Crispin &lt;blogic@openwrt.org&gt;
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/8129/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: smp-cps: Enable all hardware interrupts on secondary CPUs</title>
<updated>2014-11-24T06:44:53+00:00</updated>
<author>
<name>Andrew Bresticker</name>
<email>abrestic@chromium.org</email>
</author>
<published>2014-09-18T21:47:13+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=ff1e29ade4c677c24ee972549d20f07e466d50bf'/>
<id>urn:sha1:ff1e29ade4c677c24ee972549d20f07e466d50bf</id>
<content type='text'>
Currently interrupt vectors 2 and 5 are left disabled on secondary CPUs.
Since systems using CPS must also have a GIC, which is responsible for
routing all external interrupts and can map them to any hardware interrupt
vector, enable the remaining vectors.  The two software interrupt vectors
are left disabled since they are not used with CPS.

Signed-off-by: Andrew Bresticker &lt;abrestic@chromium.org&gt;
Reviewed-by: Qais Yousef &lt;qais.yousef@imgtec.com&gt;
Tested-by: Qais Yousef &lt;qais.yousef@imgtec.com&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: Jason Cooper &lt;jason@lakedaemon.net&gt;
Cc: Andrew Bresticker &lt;abrestic@chromium.org&gt;
Cc: Jeffrey Deans &lt;jeffrey.deans@imgtec.com&gt;
Cc: Markos Chandras &lt;markos.chandras@imgtec.com&gt;
Cc: Paul Burton &lt;paul.burton@imgtec.com&gt;
Cc: Qais Yousef &lt;qais.yousef@imgtec.com&gt;
Cc: Jonas Gorski &lt;jogo@openwrt.org&gt;
Cc: John Crispin &lt;blogic@openwrt.org&gt;
Cc: David Daney &lt;ddaney.cavm@gmail.com&gt;
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/7803/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: smp-cps: Fix entry code cache flush for systems with coherent I/O</title>
<updated>2014-07-30T18:49:36+00:00</updated>
<author>
<name>Paul Burton</name>
<email>paul.burton@imgtec.com</email>
</author>
<published>2014-07-09T11:51:05+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=0fc0708a8a2e6ff5e9ab633185903831fe478994'/>
<id>urn:sha1:0fc0708a8a2e6ff5e9ab633185903831fe478994</id>
<content type='text'>
The dma_cache_wback_inv function performs exactly as is required here,
unless the system has coherent I/O in which case it's a no-op. Call the
underlying cache writeback functions directly, which is arguably clearer
anyway given that the code doesn't actually have anything to do with
DMA in a strict sense.

Signed-off-by: Paul Burton &lt;paul.burton@imgtec.com&gt;
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/7282/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: {pm,smp}-cps: use cpu_vpe_id macro</title>
<updated>2014-07-30T18:48:42+00:00</updated>
<author>
<name>Paul Burton</name>
<email>paul.burton@imgtec.com</email>
</author>
<published>2014-07-09T11:48:21+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=c90e49f26466d1733558b8385f4755a6ee3ddafc'/>
<id>urn:sha1:c90e49f26466d1733558b8385f4755a6ee3ddafc</id>
<content type='text'>
When determining the VPE ID of a CPU, make use of the cpu_vpe_id macro
which will return 0 in a non-MT kernel build. Most code is already doing
so but a couple of places weren't. Fixing this prevents a build failure
for non-MT kernels where struct cpuinfo_mips does not contain the vpe_id
field:

  arch/mips/kernel/pm-cps.c: In function 'cps_pm_enter_state':
  arch/mips/kernel/pm-cps.c:153:51: error: 'struct cpuinfo_mips' has no
      member named 'vpe_id'
    vpe_cfg = &amp;core_cfg-&gt;vpe_config[current_cpu_data.vpe_id];

  arch/mips/kernel/smp-cps.c: In function 'wait_for_sibling_halt':
  arch/mips/kernel/smp-cps.c:363:33: error: 'struct cpuinfo_mips' has no
      member named 'vpe_id'
    unsigned vpe_id = cpu_data[cpu].vpe_id;

Signed-off-by: Paul Burton &lt;paul.burton@imgtec.com&gt;
Reviewed-by: Markos Chandras &lt;markos.chandras@imgtec.com&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: smp-cps: Convert smp_mb__after_atomic_dec()</title>
<updated>2014-06-16T11:47:47+00:00</updated>
<author>
<name>Paul Burton</name>
<email>paul.burton@imgtec.com</email>
</author>
<published>2014-06-11T10:00:56+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=e114ba20fe4f2f0a075941a06271e3f0a3539551'/>
<id>urn:sha1:e114ba20fe4f2f0a075941a06271e3f0a3539551</id>
<content type='text'>
Commit 91bbefe6b0fc "arch,mips: Convert smp_mb__*()" replaced the
smp_mb__after_atomic_dec function with smp_mb__after_atomic, whilst
commit 1d8f1f5a780a "MIPS: smp-cps: hotplug support" introduced a new
use of it. Replace that use with smp_mb__after_atomic in order to avoid
a build failure:

  arch/mips/kernel/smp-cps.c: In function 'cps_cpu_disable':
  arch/mips/kernel/smp-cps.c:304:2: error: 'smp_mb__after_atomic_dec' is
    deprecated (declared at include/linux/atomic.h:35)
    [-Werror=deprecated-declarations]

Signed-off-by: Paul Burton &lt;paul.burton@imgtec.com&gt;
Reviewed-by: Markos Chandras &lt;markos.chandras@imgtec.com&gt;
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/7085/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
</feed>
