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<title>BMC/Intel-BMC/linux.git/arch/mips/include/asm/mips-cpc.h, branch dev</title>
<subtitle>Intel OpenBMC Linux kernel source tree (mirror)</subtitle>
<id>https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev</id>
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<updated>2014-11-24T21:47:31+00:00</updated>
<entry>
<title>MIPS: Replace use of phys_t with phys_addr_t.</title>
<updated>2014-11-24T21:47:31+00:00</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2014-11-21T23:22:09+00:00</published>
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<id>urn:sha1:15d45cce3a0e0716fa49c768f887c6406dfb91f7</id>
<content type='text'>
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: CPC: provide locking functions</title>
<updated>2014-05-02T15:39:14+00:00</updated>
<author>
<name>Paul Burton</name>
<email>paul.burton@imgtec.com</email>
</author>
<published>2014-02-14T09:28:06+00:00</published>
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<id>urn:sha1:76ae658465c2319a63f3814b1e1e6e0664a1f542</id>
<content type='text'>
This patch provides functions to lock &amp; unlock access to the
"core-other" register region of the CPC. Without performing appropriate
locking it is possible for code using this region to be preempted or to
race with code on another VPE within the same core, with one changing
the core which the "core-other" region is acting upon at an inopportune
time for the other.

Signed-off-by: Paul Burton &lt;paul.burton@imgtec.com&gt;
</content>
</entry>
<entry>
<title>MIPS: CPC: provide functions to retrieve register addresses</title>
<updated>2014-05-02T15:39:14+00:00</updated>
<author>
<name>Paul Burton</name>
<email>paul.burton@imgtec.com</email>
</author>
<published>2014-02-14T09:27:15+00:00</published>
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<id>urn:sha1:2ba60250b01bfbab6b2293f8c1492312eb6a4131</id>
<content type='text'>
This patch introduces addr_ functions in addition to the existing read_
&amp; write_ functions. The new functions simply return the address of the
appropriate CPC register rather than performing a memory access. This
will be used in a subsequent patch.

Signed-off-by: Paul Burton &lt;paul.burton@imgtec.com&gt;
</content>
</entry>
<entry>
<title>MIPS: CPC: Use __raw_ memory access functions</title>
<updated>2014-03-31T16:17:13+00:00</updated>
<author>
<name>Paul Burton</name>
<email>paul.burton@imgtec.com</email>
</author>
<published>2014-03-24T10:19:35+00:00</published>
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<id>urn:sha1:9a1724c7506bfa7d3d9dcab13f83e9e6446929f9</id>
<content type='text'>
The CPC registers use native endianness, so using plain readl &amp; writel
will produce incorrect results on big endian systems.

Reported-by: Jeffrey Deans &lt;jeffrey.deans@imgtec.com&gt;
Reported-by: Keng Koh &lt;keng.koh@imgtec.com&gt;
Signed-off-by: Paul Burton &lt;paul.burton@imgtec.com&gt;
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6657/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: Add CPC probe, access functions</title>
<updated>2014-03-06T20:25:23+00:00</updated>
<author>
<name>Paul Burton</name>
<email>paul.burton@imgtec.com</email>
</author>
<published>2014-01-15T10:31:52+00:00</published>
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<id>urn:sha1:9c38cf44712af95a5ec3937d63faaea9b43eab9a</id>
<content type='text'>
This patch introduces code to probe for a MIPS Cluster Power Controller
&amp; accessor functions to allow for easy register access. This support
code will be used by a subsequent patch.

Signed-off-by: Paul Burton &lt;paul.burton@imgtec.com&gt;
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6361/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
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