<feed xmlns='http://www.w3.org/2005/Atom'>
<title>BMC/Intel-BMC/linux.git/arch/mips/include/asm/branch.h, branch dev</title>
<subtitle>Intel OpenBMC Linux kernel source tree (mirror)</subtitle>
<id>https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev</id>
<link rel='self' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev'/>
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<updated>2014-05-23T13:12:37+00:00</updated>
<entry>
<title>MIPS: Sort out mm_isBranchInstr.</title>
<updated>2014-05-23T13:12:37+00:00</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2014-04-29T13:21:24+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=76fbfc318de2eb0eb4823095ece020f999a17c63'/>
<id>urn:sha1:76fbfc318de2eb0eb4823095ece020f999a17c63</id>
<content type='text'>
mm_isBranchInstr() did reside in the math emu code even though it logically
is separate and also is used outside the math emu code.  In addition GCC 4.9.0
leaves the following unnnecessarily bloated function body for a non-microMIPS
configuration:

&lt;mm_isBranchInstr&gt;:
    105c:       afa50004        sw      a1,4(sp)
    1060:       afa60008        sw      a2,8(sp)
    1064:       afa7000c        sw      a3,12(sp)
    1068:       03e00008        jr      ra
    106c:       00001021        move    v0,zero

which stores arguments that are never going to be used on the stack frame.

Move mm_isBranchInstr() from cp1emu.c to branch.c, then split mm_isBranchInstr()
into a __mm_isBranchInstr() core and a mm_isBranchInstr() wrapper inline function
which only invokes __mm_isBranchInstr() on microMIPS configurations.

This shaves off 112 bytes off the kernel and improves code flow a bit.

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: branch: Make inclusion of &lt;asm/branch.h&gt; safe.</title>
<updated>2014-05-21T09:12:53+00:00</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2014-04-16T00:09:04+00:00</published>
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<id>urn:sha1:5160d45dd2f6e72e40f79e3dc77daa7a8337685b</id>
<content type='text'>
It was relying on other headers having been included before.

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: branch: New helpers to modify branch delay slot flag in struct pt_regs</title>
<updated>2014-05-21T09:12:49+00:00</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2014-04-15T23:52:32+00:00</published>
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<id>urn:sha1:5a7ebbf89395392f16cb5dd342b7edd154ca2d11</id>
<content type='text'>
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: MIPS16e: Support handling of delay slots.</title>
<updated>2013-05-09T15:55:20+00:00</updated>
<author>
<name>Steven J. Hill</name>
<email>Steven.Hill@imgtec.com</email>
</author>
<published>2013-03-25T18:45:19+00:00</published>
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<id>urn:sha1:8508488fe7028b95bc86c7447c205fbc765cc4cf</id>
<content type='text'>
Add logic needed to properly calculate exceptions for delay slots
when in MIPS16e mode.

Signed-off-by: Steven J. Hill &lt;Steven.Hill@imgtec.com&gt;
</content>
</entry>
<entry>
<title>MIPS: microMIPS: Support handling of delay slots.</title>
<updated>2013-05-09T15:55:18+00:00</updated>
<author>
<name>Leonid Yegoshin</name>
<email>Leonid.Yegoshin@imgtec.com</email>
</author>
<published>2013-03-25T18:08:40+00:00</published>
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<id>urn:sha1:fb6883e5809c08e43de23581759af4570ca91b0f</id>
<content type='text'>
Add logic needed to properly calculate exceptions for delay slots
when in microMIPS mode.

Signed-off-by: Leonid Yegoshin &lt;Leonid.Yegoshin@imgtec.com&gt;
Signed-off-by: Steven J. Hill &lt;Steven.Hill@imgtec.com&gt;
</content>
</entry>
<entry>
<title>MIPS Kprobes: Refactor branch emulation</title>
<updated>2011-12-07T22:04:03+00:00</updated>
<author>
<name>Maneesh Soni</name>
<email>manesoni@cisco.com</email>
</author>
<published>2011-11-08T11:37:11+00:00</published>
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<id>urn:sha1:d8d4e3ae0b5c179c0bfd3f0af5b352d13bea9cfa</id>
<content type='text'>
This patch refactors MIPS branch emulation code so as to allow skipping
delay slot instruction in case of branch likely instructions when branch is
not taken. This is useful for keeping the code common for use cases like
kprobes where one would like to handle the branch instructions keeping the
delay slot instuction also in picture for branch likely instructions. Also
allow emulation when instruction to be decoded is not at pt_regs-&gt;cp0_epc
as in case of kprobes where pt_regs-&gt;cp0_epc points to the breakpoint
instruction.

The patch also exports the function for modules.

Signed-off-by: Maneesh Soni &lt;manesoni@cisco.com&gt;
Signed-off-by: Victor Kamensky &lt;kamensky@cisco.com&gt;
Cc: David Daney &lt;david.daney@cavium.com&gt;
Cc: ananth@in.ibm.com
Cc: linux-kernel@vger.kernel.org
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2913/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: Move headfiles to new location below arch/mips/include</title>
<updated>2008-10-11T15:18:52+00:00</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2008-09-16T17:48:51+00:00</published>
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<id>urn:sha1:384740dc49ea651ba350704d13ff6be9976e37fe</id>
<content type='text'>
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
</feed>
