<feed xmlns='http://www.w3.org/2005/Atom'>
<title>BMC/Intel-BMC/linux.git/arch/mips/ath79, branch dev</title>
<subtitle>Intel OpenBMC Linux kernel source tree (mirror)</subtitle>
<id>https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev</id>
<link rel='self' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev'/>
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<updated>2015-08-03T07:25:18+00:00</updated>
<entry>
<title>MIPS: Export get_c0_perfcount_int()</title>
<updated>2015-08-03T07:25:18+00:00</updated>
<author>
<name>Felix Fietkau</name>
<email>nbd@openwrt.org</email>
</author>
<published>2015-07-23T16:59:52+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=0cb0985f57783c2f3c6c8ffe7e7665e80c56bd92'/>
<id>urn:sha1:0cb0985f57783c2f3c6c8ffe7e7665e80c56bd92</id>
<content type='text'>
get_c0_perfcount_int is tested from oprofile code. If oprofile is
compiled as module, get_c0_perfcount_int needs to be exported, otherwise
it cannot be resolved.

Fixes: a669efc4a3b4 ("MIPS: Add hook to get C0 performance counter interrupt")
Cc: stable@vger.kernel.org # v3.19+
Signed-off-by: Felix Fietkau &lt;nbd@openwrt.org&gt;
Cc: linux-mips@linux-mips.org
Cc: abrestic@chromium.org
Patchwork: https://patchwork.linux-mips.org/patch/10763/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: Add basic support for the TL-WR1043ND version 1</title>
<updated>2015-06-21T19:54:10+00:00</updated>
<author>
<name>Alban Bedel</name>
<email>albeu@free.fr</email>
</author>
<published>2015-05-31T00:18:26+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=a5fcc6522fd43acba09aa9ffca09872aaf02cd5e'/>
<id>urn:sha1:a5fcc6522fd43acba09aa9ffca09872aaf02cd5e</id>
<content type='text'>
Add a DTS for TL-WR1043ND version 1 and allow to have it built in the
kernel to circumvent the broken u-boot found on these boards.
Currently only the UART, LEDs and buttons are supported.

Signed-off-by: Alban Bedel &lt;albeu@free.fr&gt;
Cc: linux-mips@linux-mips.org
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: ath79: Add OF support to the GPIO driver</title>
<updated>2015-06-21T19:54:09+00:00</updated>
<author>
<name>Alban Bedel</name>
<email>albeu@free.fr</email>
</author>
<published>2015-05-31T00:18:24+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=2ddf3a792218cddd30140b1f8b32cb6e2d67921f'/>
<id>urn:sha1:2ddf3a792218cddd30140b1f8b32cb6e2d67921f</id>
<content type='text'>
Replace the simple GPIO chip registration by a platform driver
and make ath79_gpio_init() just register the device.

Signed-off-by: Alban Bedel &lt;albeu@free.fr&gt;
Cc: linux-mips@linux-mips.org
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: ath79: Add OF support to the clocks</title>
<updated>2015-06-21T19:54:06+00:00</updated>
<author>
<name>Alban Bedel</name>
<email>albeu@free.fr</email>
</author>
<published>2015-05-31T00:18:22+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=6451af0220a538334155261b562776f266fe5f8f'/>
<id>urn:sha1:6451af0220a538334155261b562776f266fe5f8f</id>
<content type='text'>
Allow using the SoC clocks in the device tree.

Signed-off-by: Alban Bedel &lt;albeu@free.fr&gt;
Cc: linux-mips@linux-mips.org
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: ath79: Add OF support to the IRQ controllers</title>
<updated>2015-06-21T19:54:03+00:00</updated>
<author>
<name>Alban Bedel</name>
<email>albeu@free.fr</email>
</author>
<published>2015-05-30T23:52:29+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=b29e8b87d58904e3d6bacba411557b7353f8a1a0'/>
<id>urn:sha1:b29e8b87d58904e3d6bacba411557b7353f8a1a0</id>
<content type='text'>
Add OF support for the CPU and MISC interrupt controllers of most
supported ATH79 devices.

Signed-off-by: Alban Bedel &lt;albeu@free.fr&gt;
Cc: linux-mips@linux-mips.org
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: ath79: Add basic device tree support</title>
<updated>2015-06-21T19:54:01+00:00</updated>
<author>
<name>Alban Bedel</name>
<email>albeu@free.fr</email>
</author>
<published>2015-05-30T23:52:25+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=03c8c407a8c9ba1772ea7c086b7a0f7bceecdb65'/>
<id>urn:sha1:03c8c407a8c9ba1772ea7c086b7a0f7bceecdb65</id>
<content type='text'>
Add the bare minimum to load a device tree.

Signed-off-by: Alban Bedel &lt;albeu@free.fr&gt;
Cc: linux-mips@linux-mips.org
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: ath79: Use the common clk API</title>
<updated>2015-06-21T19:53:51+00:00</updated>
<author>
<name>Alban Bedel</name>
<email>albeu@free.fr</email>
</author>
<published>2015-04-19T12:30:04+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=411520af8ec9456886359b42628e583ac58e7e44'/>
<id>urn:sha1:411520af8ec9456886359b42628e583ac58e7e44</id>
<content type='text'>
Make the code simpler and open the way for device tree clocks.

[ralf@linux-mips.org: Resolved conflict with 2a552da6 (MIPS/IRQCHIP: Move
irq_chip from arch/mips to drivers/irqchip.)]

Signed-off-by: Alban Bedel &lt;albeu@free.fr&gt;
Cc: linux-mips@linux-mips.org
Cc: Andrew Bresticker &lt;abrestic@chromium.org&gt;
Cc: Qais Yousef &lt;qais.yousef@imgtec.com&gt;
Cc: Wolfram Sang &lt;wsa@the-dreams.de&gt;
Cc: Sergey Ryazanov &lt;ryazanov.s.a@gmail.com&gt;
Cc: Gabor Juhos &lt;juhosg@openwrt.org&gt;
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/9774/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: ath79: Improve the DDR controller interface</title>
<updated>2015-06-21T19:53:51+00:00</updated>
<author>
<name>Alban Bedel</name>
<email>albeu@free.fr</email>
</author>
<published>2015-04-19T12:30:03+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=24b0e3e84fbf460ea904f4eb85e414e6001c8f37'/>
<id>urn:sha1:24b0e3e84fbf460ea904f4eb85e414e6001c8f37</id>
<content type='text'>
The DDR controller need to be used by the IRQ controller to flush
the write buffer of some devices before running the IRQ handler.
It is also used by the PCI controller to setup the PCI memory windows.

The current interface used to access the DDR controller doesn't
provides any useful abstraction and simply rely on a shared global
pointer.

Replace this by a simple API to setup the PCI memory windows and use
the write buffer flush independently of the SoC type. That remove the
need for the shared global pointer, simplify the IRQ handler code.

[ralf@linux-mips.org: Folded in Alban Bedel's follup fix.]

Signed-off-by: Alban Bedel &lt;albeu@free.fr&gt;
Cc: linux-mips@linux-mips.org
Cc: Andrew Bresticker &lt;abrestic@chromium.org&gt;
Cc: Qais Yousef &lt;qais.yousef@imgtec.com&gt;
Cc: Wolfram Sang &lt;wsa@the-dreams.de&gt;
Cc: Sergey Ryazanov &lt;ryazanov.s.a@gmail.com&gt;
Cc: Gabor Juhos &lt;juhosg@openwrt.org&gt;
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/9773/
Patchwork: http://patchwork.linux-mips.org/patch/10543/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: ath79: Correctly name the defines for the PLL_FB register</title>
<updated>2015-06-21T19:53:49+00:00</updated>
<author>
<name>Alban Bedel</name>
<email>albeu@free.fr</email>
</author>
<published>2015-04-19T12:30:02+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=626a0695a6d98338063c528d113d9ee4ba00cd78'/>
<id>urn:sha1:626a0695a6d98338063c528d113d9ee4ba00cd78</id>
<content type='text'>
This register is named PLL_FB and is not a divider but a multiplier.
To make things less confusing rename the ARxxxx_PLL_DIV_SHIFT and
ARxxxx_PLL_DIV_MASK macros to ARxxxx_PLL_FB_SHIFT and
ARxxxx_PLL_FB_MASK.

Signed-off-by: Alban Bedel &lt;albeu@free.fr&gt;
Cc: linux-mips@linux-mips.org
Cc: Andrew Bresticker &lt;abrestic@chromium.org&gt;
Cc: Qais Yousef &lt;qais.yousef@imgtec.com&gt;
Cc: Wolfram Sang &lt;wsa@the-dreams.de&gt;
Cc: Sergey Ryazanov &lt;ryazanov.s.a@gmail.com&gt;
Cc: Gabor Juhos &lt;juhosg@openwrt.org&gt;
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/9772/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: ath79: Add a missing new line in log message</title>
<updated>2015-06-02T14:07:31+00:00</updated>
<author>
<name>Alban Bedel</name>
<email>albeu@free.fr</email>
</author>
<published>2015-04-19T12:30:01+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=a26484bb7e77d474ecef1ef01ce37fb16fb84f60'/>
<id>urn:sha1:a26484bb7e77d474ecef1ef01ce37fb16fb84f60</id>
<content type='text'>
The memory setup log is missing a new line.

Signed-off-by: Alban Bedel &lt;albeu@free.fr&gt;
Cc: linux-mips@linux-mips.org
Cc: Andrew Bresticker &lt;abrestic@chromium.org&gt;
Cc: Qais Yousef &lt;qais.yousef@imgtec.com&gt;
Cc: Wolfram Sang &lt;wsa@the-dreams.de&gt;
Cc: Sergey Ryazanov &lt;ryazanov.s.a@gmail.com&gt;
Cc: Gabor Juhos &lt;juhosg@openwrt.org&gt;
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/9771/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
</feed>
