<feed xmlns='http://www.w3.org/2005/Atom'>
<title>BMC/Intel-BMC/linux.git/arch/mips/Kconfig, branch dev-4.4</title>
<subtitle>Intel OpenBMC Linux kernel source tree (mirror)</subtitle>
<id>https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev-4.4</id>
<link rel='self' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev-4.4'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/'/>
<updated>2016-03-16T15:43:01+00:00</updated>
<entry>
<title>MIPS: Fix build error when SMP is used without GIC</title>
<updated>2016-03-16T15:43:01+00:00</updated>
<author>
<name>Hauke Mehrtens</name>
<email>hauke@hauke-m.de</email>
</author>
<published>2016-03-06T21:28:56+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=588bad2ef32cae7abad24d5ca2f4611a7a7fb2a2'/>
<id>urn:sha1:588bad2ef32cae7abad24d5ca2f4611a7a7fb2a2</id>
<content type='text'>
commit 7a50e4688dabb8005df39b2b992d76629b8af8aa upstream.

The MIPS_GIC_IPI should only be selected when MIPS_GIC is also
selected, otherwise it results in a compile error. smp-gic.c uses some
functions from include/linux/irqchip/mips-gic.h like
plat_ipi_call_int_xlate() which are only added to the header file when
MIPS_GIC is set. The Lantiq SoC does not use the GIC, but supports SMP.
The calls top the functions from smp-gic.c are already protected by
some #ifdefs

The first part of this was introduced in commit 72e20142b2bf ("MIPS:
Move GIC IPI functions out of smp-cmp.c")

Signed-off-by: Hauke Mehrtens &lt;hauke@hauke-m.de&gt;
Cc: Paul Burton &lt;paul.burton@imgtec.com&gt;
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/12774/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>MIPS: vmlinux: create a section for appended DTB</title>
<updated>2015-11-12T10:35:48+00:00</updated>
<author>
<name>Aaro Koskinen</name>
<email>aaro.koskinen@nokia.com</email>
</author>
<published>2015-09-11T14:46:14+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=87db537da4cd1bfad388511a3647bbb497d2fb61'/>
<id>urn:sha1:87db537da4cd1bfad388511a3647bbb497d2fb61</id>
<content type='text'>
For bootloaders that support booting only ELF kernels and load only ELF
segments to memory there is no easy way to supply DTB without kernel
recompilation. For that purpose, create a section called .appended_dtb
that can be later updated with board-specific DTB using binutils e.g. at
kernel installation time.

Signed-off-by: Aaro Koskinen &lt;aaro.koskinen@nokia.com&gt;
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/11114/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: xilfpga: Add mipsfpga platform code</title>
<updated>2015-11-11T07:38:44+00:00</updated>
<author>
<name>Zubair Lutfullah Kakakhel</name>
<email>Zubair.Kakakhel@imgtec.com</email>
</author>
<published>2015-10-26T11:30:56+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=9937f5fff889bde488c5ffd238dcb49e9b9cc7b7'/>
<id>urn:sha1:9937f5fff889bde488c5ffd238dcb49e9b9cc7b7</id>
<content type='text'>
The xilfpga platform will be DT only.

Add required platform code.
DT files have already been added separately.

Signed-off-by: Zubair Lutfullah Kakakhel &lt;Zubair.Kakakhel@imgtec.com&gt;
Cc: robh+dt@kernel.org
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Cc: devicetree@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/11364/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: Make MIPS_CMDLINE_DTB default</title>
<updated>2015-11-11T07:38:37+00:00</updated>
<author>
<name>Jonas Gorski</name>
<email>jogo@openwrt.org</email>
</author>
<published>2015-10-12T11:13:03+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=2bcef9b457bbe159a5e3843e2578d8195e0b1c56'/>
<id>urn:sha1:2bcef9b457bbe159a5e3843e2578d8195e0b1c56</id>
<content type='text'>
Seval of-enabled machines (bmips, lantiq, xlp, pistachio, ralink) copied
the arguments from dtb to arcs_command_line to prevent the kernel from
overwriting them.

Since there is now an option to keep the dtb arguments, default to the
new option remove the "backup" to arcs_command_line in case of USE_OF is
enabled, except for those platforms that still take the bootloader
arguments or do not use any at all.

Signed-off-by: Jonas Gorski &lt;jogo@openwrt.org&gt;
Cc: linux-mips@linux-mips.org
Cc: Kevin Cernekee &lt;cernekee@gmail.com&gt;
Cc: Florian Fainelli &lt;f.fainelli@gmail.com&gt;
Cc: Zubair Lutfullah Kakakhel &lt;Zubair.Kakakhel@imgtec.com&gt;
Cc: James Hogan &lt;james.hogan@imgtec.com&gt;
Cc: John Crispin &lt;blogic@openwrt.org&gt;
Cc: Ganesan Ramalingam &lt;ganesanr@broadcom.com&gt;
Cc: Jayachandran C &lt;jchandra@broadcom.com&gt;
Cc: Andrew Bresticker &lt;abrestic@chromium.org&gt;
Cc: James Hartley &lt;james.hartley@imgtec.com&gt;
Patchwork: https://patchwork.linux-mips.org/patch/11285/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: Make the kernel arguments from dtb available</title>
<updated>2015-11-11T07:38:34+00:00</updated>
<author>
<name>Jonas Gorski</name>
<email>jogo@openwrt.org</email>
</author>
<published>2015-10-12T11:13:02+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=2024972ef5330dcae47f400c586764d8f4cb0b04'/>
<id>urn:sha1:2024972ef5330dcae47f400c586764d8f4cb0b04</id>
<content type='text'>
Similar to how arm allows using selecting between bootloader arguments,
dtb arguments and both, allow to select them on mips. But since we have
less control over the place of the dtb do not modify it but instead use
the boot_command_line for merging them.

The default is "use bootloader arguments" to keep the current behaviour
as default.

Signed-off-by: Jonas Gorski &lt;jogo@openwrt.org&gt;
Cc: linux-mips@linux-mips.org
Cc: Kevin Cernekee &lt;cernekee@gmail.com&gt;
Cc: Florian Fainelli &lt;f.fainelli@gmail.com&gt;
Cc: Zubair Lutfullah Kakakhel &lt;Zubair.Kakakhel@imgtec.com&gt;
Cc: James Hogan &lt;james.hogan@imgtec.com&gt;
Cc: John Crispin &lt;blogic@openwrt.org&gt;
Cc: Ganesan Ramalingam &lt;ganesanr@broadcom.com&gt;
Cc: Jayachandran C &lt;jchandra@broadcom.com&gt;
Cc: Andrew Bresticker &lt;abrestic@chromium.org&gt;
Cc: James Hartley &lt;james.hartley@imgtec.com&gt;
Patchwork: https://patchwork.linux-mips.org/patch/11284/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: Use USE_OF as the guard for appended dtb</title>
<updated>2015-11-11T07:38:33+00:00</updated>
<author>
<name>Jonas Gorski</name>
<email>jogo@openwrt.org</email>
</author>
<published>2015-10-12T11:13:01+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=5b24d52ce23d1c7a5c2bd884e57463e266eb8b85'/>
<id>urn:sha1:5b24d52ce23d1c7a5c2bd884e57463e266eb8b85</id>
<content type='text'>
Since OF is now a user selectable symbol, the choice for appended dtb
support should only be visible when USE_OF is selected, as this
indicates actual machine support for device tree in MIPS.

Signed-off-by: Jonas Gorski &lt;jogo@openwrt.org&gt;
Cc: linux-mips@linux-mips.org
Cc: Kevin Cernekee &lt;cernekee@gmail.com&gt;
Cc: Florian Fainelli &lt;f.fainelli@gmail.com&gt;
Cc: Zubair Lutfullah Kakakhel &lt;Zubair.Kakakhel@imgtec.com&gt;
Cc: James Hogan &lt;james.hogan@imgtec.com&gt;
Cc: John Crispin &lt;blogic@openwrt.org&gt;
Cc: Ganesan Ramalingam &lt;ganesanr@broadcom.com&gt;
Cc: Jayachandran C &lt;jchandra@broadcom.com&gt;
Cc: Andrew Bresticker &lt;abrestic@chromium.org&gt;
Cc: James Hartley &lt;james.hartley@imgtec.com&gt;
Patchwork: https://patchwork.linux-mips.org/patch/11283/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: Add LATENCYTOP support</title>
<updated>2015-11-11T07:36:46+00:00</updated>
<author>
<name>Aaro Koskinen</name>
<email>aaro.koskinen@nokia.com</email>
</author>
<published>2015-10-23T12:39:02+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=e1e1611598148e03c6d65e6c23338f4ff2cee71e'/>
<id>urn:sha1:e1e1611598148e03c6d65e6c23338f4ff2cee71e</id>
<content type='text'>
Add LATENCYTOP support for MIPS. Tested on OCTEON.

Signed-off-by: Aaro Koskinen &lt;aaro.koskinen@nokia.com&gt;
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/11353/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: VDSO: Add implementations of gettimeofday() and clock_gettime()</title>
<updated>2015-11-11T07:36:41+00:00</updated>
<author>
<name>Alex Smith</name>
<email>alex.smith@imgtec.com</email>
</author>
<published>2015-10-21T08:57:44+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=a7f4df4e21dd8a8dab96e88acd2c9c5017b83fc6'/>
<id>urn:sha1:a7f4df4e21dd8a8dab96e88acd2c9c5017b83fc6</id>
<content type='text'>
Add user-mode implementations of gettimeofday() and clock_gettime() to
the VDSO. This is currently usable with 2 clocksources: the CP0 count
register, which is accessible to user-mode via RDHWR on R2 and later
cores, or the MIPS Global Interrupt Controller (GIC) timer, which
provides a "user-mode visible" section containing a mirror of its
counter registers. This section must be mapped into user memory, which
is done below the VDSO data page.

When a supported clocksource is not in use, the VDSO functions will
return -ENOSYS, which causes libc to fall back on the standard syscall
path.

When support for neither of these clocksources is compiled into the
kernel at all, the VDSO still provides clock_gettime(), as the coarse
realtime/monotonic clocks can still be implemented. However,
gettimeofday() is not provided in this case as nothing can be done
without a suitable clocksource. This causes the symbol lookup to fail
in libc and it will then always use the standard syscall path.

This patch includes a workaround for a bug in QEMU which results in
RDHWR on the CP0 count register always returning a constant (incorrect)
value. A fix for this has been submitted, and the workaround can be
removed after the fix has been in stable releases for a reasonable
amount of time.

A simple performance test which calls gettimeofday() 1000 times in a
loop and calculates the average execution time gives the following
results on a Malta + I6400 (running at 20MHz):

 - Syscall:    ~31000 ns
 - VDSO (GIC): ~15000 ns
 - VDSO (CP0): ~9500 ns

[markos.chandras@imgtec.com:
- Minor code re-arrangements in order for mappings to be made
in the order they appear to the process' address space.
- Move do_{monotonic, realtime} outside of the MIPS_CLOCK_VSYSCALL ifdef
- Use gic_get_usm_range so we can do the GIC mapping in the
arch/mips/kernel/vdso instead of the GIC irqchip driver]

Signed-off-by: Alex Smith &lt;alex.smith@imgtec.com&gt;
Signed-off-by: Markos Chandras &lt;markos.chandras@imgtec.com&gt;
Cc: linux-kernel@vger.kernel.org
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/11338/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: Malta: Register UP SMP ops if all else fails</title>
<updated>2015-11-11T07:35:49+00:00</updated>
<author>
<name>Paul Burton</name>
<email>paul.burton@imgtec.com</email>
</author>
<published>2015-09-22T18:58:43+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=ecafe3e9b27644b51282b539878b7671ea28ac34'/>
<id>urn:sha1:ecafe3e9b27644b51282b539878b7671ea28ac34</id>
<content type='text'>
If we fail to register any real SMP implementations, fall back to
registering the dummy UP implementation. Otherwise when we build an SMP
kernel &amp; run it on a system where the SMP implementations fail to probe
(eg. QEMU) the kernel will perform a NULL dereference attempting to call
mp_ops-&gt;smp_setup() from plat_smp_setup().

Notably this fixes booting kernels with CPS SMP enabled on QEMU, which
doesn't currently implement the CM, CPC or GIC.

Signed-off-by: Paul Burton &lt;paul.burton@imgtec.com&gt;
Cc: linux-mips@linux-mips.org
Cc: Peter Hurley &lt;peter@hurleysoftware.com&gt;
Cc: Rob Herring &lt;robh@kernel.org&gt;
Cc: linux-kernel@vger.kernel.org
Cc: Markos Chandras &lt;markos.chandras@imgtec.com&gt;
Patchwork: https://patchwork.linux-mips.org/patch/11223/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: Malta: Setup RAM regions via DT</title>
<updated>2015-11-11T07:35:47+00:00</updated>
<author>
<name>Paul Burton</name>
<email>paul.burton@imgtec.com</email>
</author>
<published>2015-09-22T18:56:38+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=e81a8c7dabac05d444eda315ff1a747b0fe38396'/>
<id>urn:sha1:e81a8c7dabac05d444eda315ff1a747b0fe38396</id>
<content type='text'>
Move memory configuration to be performed via device tree for the Malta
board. This moves more Malta specific code to malta-dtshim.c, leaving
the rest of the mti-malta code a little more board-agnostic. This will
be useful to share more code between boards, with the device tree
providing the board specifics as intended.

Since we can't rely upon Malta boards running a bootloader capable of
handling devictrees &amp; filling in the required information, a piece of
shim code (malta_dt_shim) is added to consume the (e)memsize variables
provided as part of the bootloader environment (or on the kernel command
line) then generate the DT memory node using the provided values.

Signed-off-by: Paul Burton &lt;paul.burton@imgtec.com&gt;
Cc: linux-mips@linux-mips.org
Cc: devicetree@vger.kernel.org
Cc: Kumar Gala &lt;galak@codeaurora.org&gt;
Cc: linux-kernel@vger.kernel.org
Cc: Ian Campbell &lt;ijc+devicetree@hellion.org.uk&gt;
Cc: Rob Herring &lt;robh+dt@kernel.org&gt;
Cc: James Hogan &lt;james.hogan@imgtec.com&gt;
Cc: Pawel Moll &lt;pawel.moll@arm.com&gt;
Cc: Markos Chandras &lt;markos.chandras@imgtec.com&gt;
Cc: Mark Rutland &lt;mark.rutland@arm.com&gt;
Patchwork: https://patchwork.linux-mips.org/patch/11222/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
</feed>
