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<title>BMC/Intel-BMC/linux.git/arch/csky/abiv2/cacheflush.c, branch dev-5.2</title>
<subtitle>Intel OpenBMC Linux kernel source tree (mirror)</subtitle>
<id>https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev-5.2</id>
<link rel='self' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev-5.2'/>
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<updated>2019-04-22T05:44:57+00:00</updated>
<entry>
<title>csky: Fixup wrong update_mmu_cache implementation</title>
<updated>2019-04-22T05:44:57+00:00</updated>
<author>
<name>Guo Ren</name>
<email>ren_guo@c-sky.com</email>
</author>
<published>2019-04-10T02:55:07+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=981bbf274b64496fd4376b44120d47dae4ca94e8'/>
<id>urn:sha1:981bbf274b64496fd4376b44120d47dae4ca94e8</id>
<content type='text'>
In our stress test, we found some crash problem caused by:

if (!(vma-&gt;vm_flags &amp; VM_EXEC))
	return;

in update_mmu_cache().

Seems current update_mmu_cache implementation is wrong and we retread
to the conservative implementation.

Also the usage of kmap_atomic in update_mmu_cache is risky, page-virtual
may be scheduled out and changed, so we must use preempt_disable &amp;
pagefault_disable which is called by kmap_atomic().

Signed-off-by: Guo Ren &lt;ren_guo@c-sky.com&gt;
Cc: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
</entry>
<entry>
<title>csky: Cache and TLB routines</title>
<updated>2018-10-25T15:36:19+00:00</updated>
<author>
<name>Guo Ren</name>
<email>ren_guo@c-sky.com</email>
</author>
<published>2018-09-05T06:25:10+00:00</published>
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<id>urn:sha1:00a9730e1007c6cc87a7c78af2f24a4105d616ee</id>
<content type='text'>
This patch adds cache and tlb sync codes for abiv1 &amp; abiv2.

Signed-off-by: Guo Ren &lt;ren_guo@c-sky.com&gt;
Reviewed-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
</entry>
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