<feed xmlns='http://www.w3.org/2005/Atom'>
<title>BMC/Intel-BMC/linux.git/arch/blackfin/kernel/cplb-mpu, branch dev</title>
<subtitle>Intel OpenBMC Linux kernel source tree (mirror)</subtitle>
<id>https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev</id>
<link rel='self' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev'/>
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<updated>2012-03-21T03:00:06+00:00</updated>
<entry>
<title>blackfin: cplb-mpu: fix page mask table overflow</title>
<updated>2012-03-21T03:00:06+00:00</updated>
<author>
<name>Barry Song</name>
<email>barry.song@analog.com</email>
</author>
<published>2010-02-21T03:01:20+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=4936afc6510608ddabeb4f562cf1a291cc38faa1'/>
<id>urn:sha1:4936afc6510608ddabeb4f562cf1a291cc38faa1</id>
<content type='text'>
page mask table will overflow without xip related macros.

Signed-off-by: Barry Song &lt;barry.song@analog.com&gt;
Signed-off-by: Bob Liu &lt;lliubbo@gmail.com&gt;
</content>
</entry>
<entry>
<title>Blackfin: Rename IRQ flags handling functions</title>
<updated>2010-10-07T13:08:52+00:00</updated>
<author>
<name>David Howells</name>
<email>dhowells@redhat.com</email>
</author>
<published>2010-10-07T13:08:52+00:00</published>
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<id>urn:sha1:3b139cdb373282dfa72316aa56887371e97cafe8</id>
<content type='text'>
Rename h/w IRQ flags handling functions to be in line with what is expected for
the irq renaming patch.  This renames local_*_hw() to hard_local_*() using the
following perl command:

	perl -pi -e 's/local_irq_(restore|enable|disable)_hw/hard_local_irq_\1/ or s/local_irq_save_hw([_a-z]*)[(]flags[)]/flags = hard_local_irq_save\1()/' `find arch/blackfin/ -name "*.[ch]"`

and then fixing up asm/irqflags.h manually.

Additionally, arch/hard_local_save_flags() and arch/hard_local_irq_save() both
return the flags rather than passing it through the argument list.

Signed-off-by: David Howells &lt;dhowells@redhat.com&gt;
</content>
</entry>
<entry>
<title>Blackfin: move MPU anomaly check to common location</title>
<updated>2010-08-06T16:55:45+00:00</updated>
<author>
<name>Mike Frysinger</name>
<email>vapier@gentoo.org</email>
</author>
<published>2010-05-27T22:33:46+00:00</published>
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<id>urn:sha1:1ed181f248dbd26ee1bbbb1e7a61e94f875191ed</id>
<content type='text'>
Keep all anomaly/arch checks in one place to keep logic simple.

Signed-off-by: Mike Frysinger &lt;vapier@gentoo.org&gt;
</content>
</entry>
<entry>
<title>Blackfin: respect the L1 kconfig optimization in the MPU code</title>
<updated>2010-03-09T05:30:49+00:00</updated>
<author>
<name>Barry Song</name>
<email>barry.song@analog.com</email>
</author>
<published>2010-01-20T07:25:31+00:00</published>
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<id>urn:sha1:726e96561e4704278bc5197238f6459e1a63aa77</id>
<content type='text'>
Restore support for CONFIG_EXCPT_IRQ_SYSC_L1 in the MPU CPLB manager.

Signed-off-by: Barry Song &lt;barry.song@analog.com&gt;
Signed-off-by: Mike Frysinger &lt;vapier@gentoo.org&gt;
</content>
</entry>
<entry>
<title>Blackfin: initial XIP support</title>
<updated>2010-03-09T05:30:48+00:00</updated>
<author>
<name>Barry Song</name>
<email>barry.song@analog.com</email>
</author>
<published>2010-01-07T04:11:17+00:00</published>
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<id>urn:sha1:d86bfb1600db38e8387beee0aaab4263cfd728a2</id>
<content type='text'>
Signed-off-by: Barry Song &lt;barry.song@analog.com&gt;
Signed-off-by: Mike Frysinger &lt;vapier@gentoo.org&gt;
</content>
</entry>
<entry>
<title>Blackfin: MPU: handle caches for reserved memory</title>
<updated>2010-03-09T05:30:46+00:00</updated>
<author>
<name>Sonic Zhang</name>
<email>sonic.zhang@analog.com</email>
</author>
<published>2009-12-09T07:01:50+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=5792ab2a0a22fdaef33056ca2b31847a28b1af60'/>
<id>urn:sha1:5792ab2a0a22fdaef33056ca2b31847a28b1af60</id>
<content type='text'>
We weren't handling the user-specified cache behavior for the reserved
memory regions (via mem=/max_mem=).  The no-MPU code already takes care
of this, so add support to the MPU code as well.

Signed-off-by: Sonic Zhang &lt;sonic.zhang@analog.com&gt;
Signed-off-by: Mike Frysinger &lt;vapier@gentoo.org&gt;
</content>
</entry>
<entry>
<title>Blackfin: fix MPU page permission masks overflow when dealing with async memory</title>
<updated>2010-03-09T05:30:46+00:00</updated>
<author>
<name>Barry Song</name>
<email>barry.song@analog.com</email>
</author>
<published>2009-12-07T10:05:58+00:00</published>
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<id>urn:sha1:e18e7dd33454f277b9438af66d25984362278021</id>
<content type='text'>
Attempting to use the MPU while doing XIP out of parallel flash hooked up
to the async memory bus would often result in random crashes as the MPU
slowly corrupted memory.

The fallout here is that the async banks gain MPU protection from user
space too.  So any accesses have to go through the mmap() interface rather
than just using hardcoded pointers.

Signed-off-by: Barry Song &lt;barry.song@analog.com&gt;
Signed-off-by: Mike Frysinger &lt;vapier@gentoo.org&gt;
</content>
</entry>
<entry>
<title>Blackfin: MPU: add missing __init markings</title>
<updated>2009-12-15T05:16:53+00:00</updated>
<author>
<name>Mike Frysinger</name>
<email>vapier@gentoo.org</email>
</author>
<published>2009-12-12T14:22:22+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=0a68b5341de1d80cf0ec8e6c9a851e4bfd99787c'/>
<id>urn:sha1:0a68b5341de1d80cf0ec8e6c9a851e4bfd99787c</id>
<content type='text'>
Signed-off-by: Mike Frysinger &lt;vapier@gentoo.org&gt;
</content>
</entry>
<entry>
<title>Blackfin: MPU: support XIP in async flash memory</title>
<updated>2009-12-15T05:15:54+00:00</updated>
<author>
<name>Barry Song</name>
<email>barry.song@analog.com</email>
</author>
<published>2009-12-02T02:50:43+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=e187837b6f23c99c219ffc1d42aa18567f6e299d'/>
<id>urn:sha1:e187837b6f23c99c219ffc1d42aa18567f6e299d</id>
<content type='text'>
The NOMPU code already supported executing in the async banks, so this
brings the MPU code in line.

Signed-off-by: Barry Song &lt;barry.song@analog.com&gt;
Signed-off-by: Mike Frysinger &lt;vapier@gentoo.org&gt;
</content>
</entry>
<entry>
<title>Blackfin: fix cache Kconfig typo</title>
<updated>2009-11-25T07:35:35+00:00</updated>
<author>
<name>André Goddard Rosa</name>
<email>andre.goddard@gmail.com</email>
</author>
<published>2009-10-30T07:57:22+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=7bae2c4898dd6e1e4a8276e5c428c55a7ff01bdf'/>
<id>urn:sha1:7bae2c4898dd6e1e4a8276e5c428c55a7ff01bdf</id>
<content type='text'>
The Kconfig option is "BFIN_EXTMEM_WRITETHROUGH", not "..._WRITETROUGH".

Signed-off-by: André Goddard Rosa &lt;andre.goddard@gmail.com&gt;
Signed-off-by: Mike Frysinger &lt;vapier@gentoo.org&gt;
</content>
</entry>
</feed>
