<feed xmlns='http://www.w3.org/2005/Atom'>
<title>BMC/Intel-BMC/linux.git/arch/blackfin/include/asm/mem_init.h, branch dev</title>
<subtitle>Intel OpenBMC Linux kernel source tree (mirror)</subtitle>
<id>https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev</id>
<link rel='self' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/'/>
<updated>2013-05-07T10:25:59+00:00</updated>
<entry>
<title>blackfin: dmc: Improve DDR2 write through in DMC effict controller.</title>
<updated>2013-05-07T10:25:59+00:00</updated>
<author>
<name>Sonic Zhang</name>
<email>sonic.zhang@analog.com</email>
</author>
<published>2012-11-29T03:41:17+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=c83a917112ccab57044e4c8aede4c0a765c1041c'/>
<id>urn:sha1:c83a917112ccab57044e4c8aede4c0a765c1041c</id>
<content type='text'>
Signed-off-by: Sonic Zhang &lt;sonic.zhang@analog.com&gt;
Signed-off-by: Steven Miao &lt;realmz6@gmail.com&gt;
</content>
</entry>
<entry>
<title>blackfin: mem_init: update dmc config register</title>
<updated>2013-02-20T07:21:22+00:00</updated>
<author>
<name>Bob Liu</name>
<email>lliubbo@gmail.com</email>
</author>
<published>2012-12-20T07:13:48+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=c428f8eb2f473963585b0c0a31cb33dccad62b9a'/>
<id>urn:sha1:c428f8eb2f473963585b0c0a31cb33dccad62b9a</id>
<content type='text'>
Update dmc config register to increase memory performance.

Signed-off-by: Bob Liu &lt;lliubbo@gmail.com&gt;
</content>
</entry>
<entry>
<title>bfin: reorg clock init steps for bf609</title>
<updated>2012-07-24T05:39:49+00:00</updated>
<author>
<name>Bob Liu</name>
<email>lliubbo@gmail.com</email>
</author>
<published>2012-07-23T02:47:48+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=f82f16d2f55a68a5134e26edbc9303fe8048764f'/>
<id>urn:sha1:f82f16d2f55a68a5134e26edbc9303fe8048764f</id>
<content type='text'>
So that user can set the clocks through menuconfig.

Signed-off-by: Bob Liu &lt;lliubbo@gmail.com&gt;
</content>
</entry>
<entry>
<title>Blackfin: remove CONFIG_MEM_GENERIC_BOARD</title>
<updated>2010-08-06T16:55:57+00:00</updated>
<author>
<name>Christian Dietrich</name>
<email>qy03fugy@stud.informatik.uni-erlangen.de</email>
</author>
<published>2010-08-02T16:01:58+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=efbd24b5b050c586c059ee68c57c09996e7be886'/>
<id>urn:sha1:efbd24b5b050c586c059ee68c57c09996e7be886</id>
<content type='text'>
MEM_GENERIC_BOARD depends on GENERIC_BOARD, but this flag was removed
in 4f25eb85d64640bc656e72917113a84701521b99, therefore all references
to it from the source can be removed.

Signed-off-by: Christian Dietrich &lt;qy03fugy@stud.informatik.uni-erlangen.de&gt;
Signed-off-by: Mike Frysinger &lt;vapier@gentoo.org&gt;
</content>
</entry>
<entry>
<title>Blackfin: punt dead/unused flash mem_init settings</title>
<updated>2009-12-15T05:15:33+00:00</updated>
<author>
<name>Mike Frysinger</name>
<email>vapier@gentoo.org</email>
</author>
<published>2009-11-15T07:42:34+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=43acb9cdef3e5775f20d88fe6eb845f248c4a83d'/>
<id>urn:sha1:43acb9cdef3e5775f20d88fe6eb845f248c4a83d</id>
<content type='text'>
I don't think these defines were ever used.  At any rate, we have common
bit defines for all parts as well as a Kconfig option to declare the EBIU
async timings, and no one has really complained about this so far.

Signed-off-by: Mike Frysinger &lt;vapier@gentoo.org&gt;
</content>
</entry>
<entry>
<title>Blackfin: bf526-ezbrd: handle different SDRAM chips</title>
<updated>2009-06-23T01:16:12+00:00</updated>
<author>
<name>Graf Yang</name>
<email>graf.yang@analog.com</email>
</author>
<published>2009-06-18T04:32:04+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=ee48efb5dc45aeb9786dea6469d3e1bea5105036'/>
<id>urn:sha1:ee48efb5dc45aeb9786dea6469d3e1bea5105036</id>
<content type='text'>
The BF526-EZBRD changed SDRAM chips between board revisions, so create a
timing table that can accommodate both.

Signed-off-by: Graf Yang &lt;graf.yang@analog.com&gt;
Signed-off-by: Mike Frysinger &lt;vapier@gentoo.org&gt;
</content>
</entry>
<entry>
<title>Blackfin: fix typo in TRAS define in mem_init.h header</title>
<updated>2009-06-23T01:16:10+00:00</updated>
<author>
<name>Graf Yang</name>
<email>graf.yang@analog.com</email>
</author>
<published>2009-06-18T04:21:39+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=8f580f7c82ed9edeb3629568aabcde2caff3f236'/>
<id>urn:sha1:8f580f7c82ed9edeb3629568aabcde2caff3f236</id>
<content type='text'>
We defined SDRAM_tRAS to TRAS_4, but then wrongly defined SDRAM_tRAS_num
to 3.

Signed-off-by: Graf Yang &lt;graf.yang@analog.com&gt;
Signed-off-by: Mike Frysinger &lt;vapier@gentoo.org&gt;
</content>
</entry>
<entry>
<title>Blackfin arch: Fix Bug - Kernel does not boot if re-program clocks</title>
<updated>2009-02-04T08:49:45+00:00</updated>
<author>
<name>Michael Hennerich</name>
<email>michael.hennerich@analog.com</email>
</author>
<published>2009-02-04T08:49:45+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=331693129d1764e38b15561e5712347fd591b2a9'/>
<id>urn:sha1:331693129d1764e38b15561e5712347fd591b2a9</id>
<content type='text'>
On BF561 EBIU_SDGCTL bit 31 controls the SDRAM external data
path width, typically set 0 for a 32-bit bus width. On other
Blackfin derivatives this bit should be set by default.

Signed-off-by: Michael Hennerich &lt;michael.hennerich@analog.com&gt;
Signed-off-by: Bryan Wu &lt;cooloney@kernel.org&gt;

</content>
</entry>
<entry>
<title>Blackfin arch: enable reprogram cclk and sclk for bf518f-ezbrd</title>
<updated>2009-01-07T15:14:38+00:00</updated>
<author>
<name>Sonic Zhang</name>
<email>sonic.zhang@analog.com</email>
</author>
<published>2009-01-07T15:14:38+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=4934540d9fd49c13dd1fbef640fcdad75e9a3329'/>
<id>urn:sha1:4934540d9fd49c13dd1fbef640fcdad75e9a3329</id>
<content type='text'>
Signed-off-by: Sonic Zhang &lt;sonic.zhang@analog.com&gt;
Signed-off-by: Bryan Wu &lt;cooloney@kernel.org&gt;

</content>
</entry>
<entry>
<title>Blackfin arch: fix bugs and unify BFIN_KERNEL_CLOCK option</title>
<updated>2009-01-07T15:14:39+00:00</updated>
<author>
<name>Michael Hennerich</name>
<email>michael.hennerich@analog.com</email>
</author>
<published>2009-01-07T15:14:39+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=73feb5c09dcf0d64beb67aa5e1f79e11a388e0ff'/>
<id>urn:sha1:73feb5c09dcf0d64beb67aa5e1f79e11a388e0ff</id>
<content type='text'>
 - remove duplicated code and headers
 - add option allowing arbitrary SDRAM/DDR Timing parameters.
 - mark automatically calculated timings as EXPERIMENTAL
 - fix comment header block

Related to BUGs:
 - kernel boot up fails with CONFIG_BFIN_KERNEL_CLOCK item on.
 - kernel does not boot if re-program clocks

[ Mike Frysinger &lt;vapier.adi@gmail.com&gt;
 - fix comment header
 - mark do_sync static
 - document the DMA shutdown
 - simplify SIC_IWR handling
 - fix ANOMALY_05000265 handling to work as intended ]

Signed-off-by: Michael Hennerich &lt;michael.hennerich@analog.com&gt;
Signed-off-by: Mike Frysinger &lt;vapier.adi@gmail.com&gt;
Signed-off-by: Bryan Wu &lt;cooloney@kernel.org&gt;

</content>
</entry>
</feed>
