<feed xmlns='http://www.w3.org/2005/Atom'>
<title>BMC/Intel-BMC/linux.git/arch/blackfin/include/asm/dpmc.h, branch dev</title>
<subtitle>Intel OpenBMC Linux kernel source tree (mirror)</subtitle>
<id>https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev</id>
<link rel='self' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/'/>
<updated>2012-07-24T05:39:48+00:00</updated>
<entry>
<title>pm: dpmc macro typo fix</title>
<updated>2012-07-24T05:39:48+00:00</updated>
<author>
<name>Steven Miao</name>
<email>realmz6@gmail.com</email>
</author>
<published>2012-05-23T10:40:24+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=7546eb0d06c363f610bef236358818b93af7c7cd'/>
<id>urn:sha1:7546eb0d06c363f610bef236358818b93af7c7cd</id>
<content type='text'>
Signed-off-by: Steven Miao &lt;realmz6@gmail.com&gt;
Signed-off-by: Bob Liu &lt;lliubbo@gmail.com&gt;
</content>
</entry>
<entry>
<title>blackfin: bf60x: pm: Add a debug option to calculate kernel wakeup time.</title>
<updated>2012-05-21T06:54:52+00:00</updated>
<author>
<name>Sonic Zhang</name>
<email>sonic.zhang@analog.com</email>
</author>
<published>2012-05-17T09:33:00+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=72b099ed93989575b0c447023748968d30059e8f'/>
<id>urn:sha1:72b099ed93989575b0c447023748968d30059e8f</id>
<content type='text'>
Display the total time when kernel resumes normal from standby or suspend to mem
mode.

Signed-off-by: Sonic Zhang &lt;sonic.zhang@analog.com&gt;
Signed-off-by: Bob Liu &lt;lliubbo@gmail.com&gt;
</content>
</entry>
<entry>
<title>blackfin: bf60x: add wakeup source select</title>
<updated>2012-05-21T06:54:50+00:00</updated>
<author>
<name>Steven Miao</name>
<email>realmz6@gmail.com</email>
</author>
<published>2012-05-17T09:29:54+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=0fbd88ca20a68a633b565e1f5ba18ca64afb0c78'/>
<id>urn:sha1:0fbd88ca20a68a633b565e1f5ba18ca64afb0c78</id>
<content type='text'>
Support select the wakeup source for power management on bf60x.

Signed-off-by: Steven Miao &lt;realmz6@gmail.com&gt;
Signed-off-by: Bob Liu &lt;lliubbo@gmail.com&gt;
</content>
</entry>
<entry>
<title>blackfin: bf60x: add power management support</title>
<updated>2012-05-21T06:54:24+00:00</updated>
<author>
<name>Steven Miao</name>
<email>realmz6@gmail.com</email>
</author>
<published>2012-05-16T10:26:10+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=93f89519fd31c21e5d606faf4091f5905db38412'/>
<id>urn:sha1:93f89519fd31c21e5d606faf4091f5905db38412</id>
<content type='text'>
Add bf60x cpu pm callbacks and change blackfin pm framework to support bf60x.

Signed-off-by: Steven Miao &lt;realmz6@gmail.com&gt;
Signed-off-by: Bob Liu &lt;lliubbo@gmail.com&gt;
</content>
</entry>
<entry>
<title>Blackfin: dpmc: optimize hibernate/resume path</title>
<updated>2011-07-23T05:18:29+00:00</updated>
<author>
<name>Mike Frysinger</name>
<email>vapier@gentoo.org</email>
</author>
<published>2011-06-27T03:11:19+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=eed7b8365807549c67613ea7d9a451262050ba3e'/>
<id>urn:sha1:eed7b8365807549c67613ea7d9a451262050ba3e</id>
<content type='text'>
The current save logic used in hibernation is to do a MMR load (base +
offset) into a register, and then push that onto the stack.  Then when
restoring, pop off the stack into a register followed by a MMR store
(base + offset).  These use plenty of 32bit insns rather than 16bit,
are pretty long winded, and full of pipeline bubbles.

So, by taking advantage of MMRs that are contiguous, the multi-register
push/pop insn, and register abuse, we can shrink this code considerably.

When saving, the new logic does a lot of loads into the data and pointer
registers before executing a single multi-register push insn.  Then when
restoring, we do a single multi-register pop insn followed by a lot of
stores.  Overall, this allows us to cut the insn count by ~30%, the code
size by ~45%, and drastically reduce the register hazards that trigger
bubbles in the pipeline.

Signed-off-by: Mike Frysinger &lt;vapier@gentoo.org&gt;
</content>
</entry>
<entry>
<title>Blackfin: dpmc: relocate hibernate helper macros</title>
<updated>2011-07-23T05:18:28+00:00</updated>
<author>
<name>Mike Frysinger</name>
<email>vapier@gentoo.org</email>
</author>
<published>2011-06-26T18:11:24+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=584ecbaa258de953a9bc34ce4b978b0033e54dc4'/>
<id>urn:sha1:584ecbaa258de953a9bc34ce4b978b0033e54dc4</id>
<content type='text'>
This defines only get used in the hibernate code, so remove them from the
global dpmc header as no one else cares.

Signed-off-by: Mike Frysinger &lt;vapier@gentoo.org&gt;
</content>
</entry>
<entry>
<title>Blackfin: SMP: implement cpu_freq support</title>
<updated>2011-03-18T08:01:03+00:00</updated>
<author>
<name>Graf Yang</name>
<email>graf.yang@analog.com</email>
</author>
<published>2010-01-28T10:46:55+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=6f546bc3ac9eedbf770bf3bcbc45ce2ea32c94ad'/>
<id>urn:sha1:6f546bc3ac9eedbf770bf3bcbc45ce2ea32c94ad</id>
<content type='text'>
Re-use some of the existing cpu hotplugging code in the process.

Signed-off-by: Graf Yang &lt;graf.yang@analog.com&gt;
Signed-off-by: Mike Frysinger &lt;vapier@gentoo.org&gt;
</content>
</entry>
<entry>
<title>Blackfin: dpmc.h: pull in new pll.h</title>
<updated>2011-01-10T12:18:17+00:00</updated>
<author>
<name>Mike Frysinger</name>
<email>vapier@gentoo.org</email>
</author>
<published>2010-10-28T19:34:09+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=e15124c14c12a3809dfce4517a2afcbe1cf9b346'/>
<id>urn:sha1:e15124c14c12a3809dfce4517a2afcbe1cf9b346</id>
<content type='text'>
Any consumer of dpmc.h expects to use VR_CTL, so also pull in the new
mach/pll.h header for those functions.

Signed-off-by: Mike Frysinger &lt;vapier@gentoo.org&gt;
</content>
</entry>
<entry>
<title>Blackfin: eat spurious space in asm/dpmc.h</title>
<updated>2010-03-09T05:30:53+00:00</updated>
<author>
<name>Mike Frysinger</name>
<email>vapier@gentoo.org</email>
</author>
<published>2010-03-04T12:35:30+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=f2b0cd61cf635cbdc110472f6edc97328322cb8b'/>
<id>urn:sha1:f2b0cd61cf635cbdc110472f6edc97328322cb8b</id>
<content type='text'>
Signed-off-by: Mike Frysinger &lt;vapier@gentoo.org&gt;
</content>
</entry>
<entry>
<title>Blackfin: unify duplicated power masks</title>
<updated>2009-12-15T05:14:53+00:00</updated>
<author>
<name>Mike Frysinger</name>
<email>vapier@gentoo.org</email>
</author>
<published>2009-10-15T06:47:28+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=a8e8e491686bb34eb5aea37f58c9020f48629237'/>
<id>urn:sha1:a8e8e491686bb34eb5aea37f58c9020f48629237</id>
<content type='text'>
Signed-off-by: Mike Frysinger &lt;vapier@gentoo.org&gt;
</content>
</entry>
</feed>
