BMC/Intel-BMC/linux.git/arch/arm, branch dev-5.7

Merge tag 'v5.7.12' into dev-5.7

2020-08-04T07:58:36+00:00

This is the 5.7.12 stable release Signed-off-by: Joel Stanley

ARM: dts: n900: remove mmc1 card detect gpio

2020-07-29T08:19:51+00:00

[ Upstream commit ed3e98e919aaaa47e9d9f8a40c3f6f4a22577842 ] Instead, expose the key via the input framework, as SW_MACHINE_COVER The chip-detect GPIO is actually detecting if the cover is closed. Technically it's possible to use the SD card with open cover. The only downside is risk of battery falling out and user being able to physically remove the card. The behaviour of SD card not being available when the device is open is unexpected and creates more problems than it solves. There is a high chance, that more people accidentally break their rootfs by opening the case without physically removing the card. Reviewed-by: Sebastian Reichel Acked-by: Tony Lindgren Signed-off-by: Merlijn Wajer Link: https://lore.kernel.org/r/20200612125402.18393-3-merlijn@wizzup.org Signed-off-by: Dmitry Torokhov Signed-off-by: Sasha Levin

ARM: dts: aspeed: rainier: Add CFAM SPI controllers

2020-07-27T04:49:07+00:00

Add the four SPI masters on each CFAM. Each master has four 128KB EEPROM devices attached to it. OpenBMC-Staging-Count: 1 Signed-off-by: Eddie James Signed-off-by: Joel Stanley

ARM: dts: aspeed: rainier: Add FSI I2C masters

2020-07-27T04:48:53+00:00

The host processor contains i2c masters on each cfam. OpenBMC-Staging-Count: 1 Signed-off-by: Joel Stanley

Remove checkstop GPIO from gpio-keys definitions

2020-07-27T03:16:48+00:00

Attention handler will monitor the checkstop gpio via the character device interface so it needs to not be defined. OpenBMC-Staging-Count: 1 Signed-off-by: Ben Tyner Signed-off-by: Joel Stanley

ARM: dts: Aspeed: tacoma: Enable EHCI controller

2020-07-27T02:31:37+00:00

Enable the second EHCI controller on the AST2600. Also add a line-name for the GPIO that controls power to the USB port. The power control is in place to allow the port to be disabled, for those that are worried about rogue USB sticks. OpenBMC-Staging-Count: 1 Signed-off-by: Eddie James Signed-off-by: Joel Stanley

ARM: dts: aspeed: rainier: Enable EHCI controller

2020-07-27T02:31:02+00:00

ARM: dts: aspeed: rainier: Switch OCCs to P10

2020-07-27T02:25:38+00:00

Rainier uses the P10 processor so the OCC binding should reflect that. OpenBMC-Staging-Count: 1 Signed-off-by: Eddie James Signed-off-by: Joel Stanley

ARM: dts: aspeed: tacoma: Add CFAM reset GPIO

2020-07-24T07:03:47+00:00

The GPIO on Q0 is used for resetting the CFAM of the processor that the ASPEED master is connected to. OpenBMC-Staging-Count: 1 Reviewed-by: Andrew Jeffery Signed-off-by: Joel Stanley

ARM: dts: aspeed: rainier: Add CFAM reset GPIO

2020-07-24T07:03:39+00:00

The GPIO on Q0 is used for resetting the CFAM of the processor that the ASPEED master is connected to. The signal is wired as active high on the first pass systems. OpenBMC-Staging-Count: 1 Reviewed-by: Andrew Jeffery Signed-off-by: Joel Stanley