BMC/Intel-BMC/linux.git/arch/arm, branch dev-5.15-intel

ARM: configs: intel_bmc: Enable PECI I3C driver

2022-06-06T10:22:57+00:00

Enable PECI over I3C driver for I3C device. Signed-off-by: Oleksandr Shulzhenko

ARM: configs: intel_bmc: Enable I3C MCTP drivers

2022-05-25T11:23:21+00:00

Enable I3C MCTP drivers for both Controller and Target. Signed-off-by: Iwona Winiarska

Merge commit '49caedb668e476c100d727f2174724e0610a2b92' of https://github.com/openbmc/linux into openbmc/dev-5.15-intel-bump_v5.15.36

2022-05-12T14:46:40+00:00

Signed-off-by: Sujoy Ray

Merge tag 'v5.15.36' into dev-5.15

2022-04-28T01:48:30+00:00

This is the 5.15.36 stable release Signed-off-by: Joel Stanley

ARM: vexpress/spc: Avoid negative array index when !SMP

2022-04-27T12:38:55+00:00

[ Upstream commit b3f1dd52c991d79118f35e6d1bf4d7cb09882e38 ] When building multi_v7_defconfig+CONFIG_SMP=n, -Warray-bounds exposes a couple negative array index accesses: arch/arm/mach-vexpress/spc.c: In function 've_spc_clk_init': arch/arm/mach-vexpress/spc.c:583:21: warning: array subscript -1 is below array bounds of 'bool[2]' {aka '_Bool[2]'} [-Warray-bounds] 583 | if (init_opp_table[cluster]) | ~~~~~~~~~~~~~~^~~~~~~~~ arch/arm/mach-vexpress/spc.c:556:7: note: while referencing 'init_opp_table' 556 | bool init_opp_table[MAX_CLUSTERS] = { false }; | ^~~~~~~~~~~~~~ arch/arm/mach-vexpress/spc.c:592:18: warning: array subscript -1 is below array bounds of 'bool[2]' {aka '_Bool[2]'} [-Warray-bounds] 592 | init_opp_table[cluster] = true; | ~~~~~~~~~~~~~~^~~~~~~~~ arch/arm/mach-vexpress/spc.c:556:7: note: while referencing 'init_opp_table' 556 | bool init_opp_table[MAX_CLUSTERS] = { false }; | ^~~~~~~~~~~~~~ Skip this logic when built !SMP. Link: https://lore.kernel.org/r/20220331190443.851661-1-keescook@chromium.org Cc: Liviu Dudau Cc: Sudeep Holla Cc: Lorenzo Pieralisi Cc: Russell King Cc: linux-arm-kernel@lists.infradead.org Acked-by: Liviu Dudau Signed-off-by: Kees Cook Signed-off-by: Sudeep Holla Signed-off-by: Sasha Levin

Merge tag 'v5.15.35' into dev-5.15

2022-04-27T08:56:35+00:00

This is the 5.15.35 stable release Signed-off-by: Joel Stanley

ARM: dts: aspeed: everest, rainier: Add power-ffs-sync-history GPIO

2022-04-27T08:51:39+00:00

The IBM Everest and Rainier systems have a GPIO line that goes to the power supplies. It has a dual function: 1) Fans Full Speed, and 2) Sync input history. OpenBMC-Staging-Count: 1 Signed-off-by: Brandon Wyman Link: https://lore.kernel.org/r/20220421213638.1151193-1-bjwyman@gmail.com Signed-off-by: Joel Stanley

ARM: davinci: da850-evm: Avoid NULL pointer dereference

2022-04-20T07:34:20+00:00

commit 83a1cde5c74bfb44b49cb2a940d044bb2380f4ea upstream. With newer versions of GCC, there is a panic in da850_evm_config_emac() when booting multi_v5_defconfig in QEMU under the palmetto-bmc machine: Unable to handle kernel NULL pointer dereference at virtual address 00000020 pgd = (ptrval) [00000020] *pgd=00000000 Internal error: Oops: 5 [#1] PREEMPT ARM Modules linked in: CPU: 0 PID: 1 Comm: swapper Not tainted 5.15.0 #1 Hardware name: Generic DT based system PC is at da850_evm_config_emac+0x1c/0x120 LR is at do_one_initcall+0x50/0x1e0 The emac_pdata pointer in soc_info is NULL because davinci_soc_info only gets populated on davinci machines but da850_evm_config_emac() is called on all machines via device_initcall(). Move the rmii_en assignment below the machine check so that it is only dereferenced when running on a supported SoC. Fixes: bae105879f2f ("davinci: DA850/OMAP-L138 EVM: implement autodetect of RMII PHY") Signed-off-by: Nathan Chancellor Reviewed-by: Arnd Bergmann Reviewed-by: Bartosz Golaszewski Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/YcS4xVWs6bQlQSPC@archlinux-ax161/ Signed-off-by: Arnd Bergmann Signed-off-by: Greg Kroah-Hartman

ARM: dts: aspeed: add reset properties into MDIO nodes

2022-04-19T00:20:44+00:00

Add reset control properties into MDIO nodes. The 4 MDIO controllers in AST2600 SOC share one reset control bit SCU50[3]. OpenBMC-Staging-Count: 1 Signed-off-by: Dylan Hung Reviewed-by: Andrew Jeffery Link: https://lore.kernel.org/r/20220418014059.3054-4-dylan_hung@aspeedtech.com Signed-off-by: Joel Stanley

ARM: dts: aspeed: bletchley: add sample averaging for ADM1278

2022-04-18T10:15:30+00:00

set number of sample averaging to 128 for both PWR_AVG and VI_AVG OpenBMC-Staging-Count: 1 Signed-off-by: Potin Lai Reviewed-by: Patrick Williams Link: https://lore.kernel.org/r/20220418094827.6185-1-potin.lai@quantatw.com Signed-off-by: Joel Stanley