<feed xmlns='http://www.w3.org/2005/Atom'>
<title>BMC/Intel-BMC/linux.git/arch/arm64/mm/ioremap.c, branch dev</title>
<subtitle>Intel OpenBMC Linux kernel source tree (mirror)</subtitle>
<id>https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev</id>
<link rel='self' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev'/>
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<updated>2015-01-23T15:29:06+00:00</updated>
<entry>
<title>arm64: add ioremap physical address information</title>
<updated>2015-01-23T15:29:06+00:00</updated>
<author>
<name>Min-Hua Chen</name>
<email>orca.chen@gmail.com</email>
</author>
<published>2014-12-26T16:52:10+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=da1f2b82054c171166ca0069cd60aa9300127cf1'/>
<id>urn:sha1:da1f2b82054c171166ca0069cd60aa9300127cf1</id>
<content type='text'>
In /proc/vmallocinfo, it's good to show the physical address
of each ioremap in vmallocinfo. Add physical address information
in arm64 ioremap.

0xffffc900047f2000-0xffffc900047f4000    8192 _nv013519rm+0x57/0xa0
[nvidia] phys=f8100000 ioremap
0xffffc900047f4000-0xffffc900047f6000    8192 _nv013519rm+0x57/0xa0
[nvidia] phys=f8008000 ioremap
0xffffc90004800000-0xffffc90004821000  135168 e1000_probe+0x22c/0xb95
[e1000e] phys=f4300000 ioremap
0xffffc900049c0000-0xffffc900049e1000  135168 _nv013521rm+0x4d/0xd0
[nvidia] phys=e0140000 ioremap

Signed-off-by: Min-Hua Chen &lt;orca.chen@gmail.com&gt;
Acked-by: Will Deacon &lt;will.deacon@arm.com&gt;
Signed-off-by: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
</content>
</entry>
<entry>
<title>arm64: Factor out fixmap initialization from ioremap</title>
<updated>2014-11-25T15:56:45+00:00</updated>
<author>
<name>Laura Abbott</name>
<email>lauraa@codeaurora.org</email>
</author>
<published>2014-11-21T21:50:42+00:00</published>
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<id>urn:sha1:af86e5974d3069bd26ebcf7c046c6e59726acaaa</id>
<content type='text'>
The fixmap API was originally added for arm64 for
early_ioremap purposes. It can be used for other purposes too
so move the initialization from ioremap to somewhere more
generic. This makes it obvious where the fixmap is being set
up and allows for a cleaner implementation of __set_fixmap.

Reviewed-by: Kees Cook &lt;keescook@chromium.org&gt;
Acked-by: Mark Rutland &lt;mark.rutland@arm.com&gt;
Tested-by: Mark Rutland &lt;mark.rutland@arm.com&gt;
Tested-by: Kees Cook &lt;keescook@chromium.org&gt;
Signed-off-by: Laura Abbott &lt;lauraa@codeaurora.org&gt;
Signed-off-by: Will Deacon &lt;will.deacon@arm.com&gt;
</content>
</entry>
<entry>
<title>arm64: mm: Correct fixmap pagetable types</title>
<updated>2014-10-20T16:47:02+00:00</updated>
<author>
<name>Steve Capper</name>
<email>steve.capper@linaro.org</email>
</author>
<published>2014-10-17T14:27:38+00:00</published>
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<id>urn:sha1:c0260ba906c4dfbcccd6414c3e2c0e73a7d7e35a</id>
<content type='text'>
Compiling with STRICT_MM_TYPECHECKS gives the following
arch/arm64/mm/ioremap.c: In function ‘early_ioremap_init’:
arch/arm64/mm/ioremap.c:152:2: warning: passing argument 3 of
‘pud_populate’ from incompatible pointer type
  pud_populate(&amp;init_mm, pud, bm_pmd);

The data types for bm_pmd and bm_pud are incorrectly set to pte_t.
This patch corrects these types.

Signed-off-by: Steve Capper &lt;steve.capper@linaro.org&gt;
Signed-off-by: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
</content>
</entry>
<entry>
<title>arm64: Convert bool ARM64_x_LEVELS to int ARM64_PGTABLE_LEVELS</title>
<updated>2014-07-23T14:27:46+00:00</updated>
<author>
<name>Catalin Marinas</name>
<email>catalin.marinas@arm.com</email>
</author>
<published>2014-07-15T14:37:21+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=abe669d7e1a8f9163eb7e8e153e7257d38c1ba3e'/>
<id>urn:sha1:abe669d7e1a8f9163eb7e8e153e7257d38c1ba3e</id>
<content type='text'>
Rather than having several Kconfig options, define int
ARM64_PGTABLE_LEVELS which will be also useful in converting some of the
pgtable macros.

Signed-off-by: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
Tested-by: Jungseok Lee &lt;jungseoklee85@gmail.com&gt;
</content>
</entry>
<entry>
<title>arm64: mm: Implement 4 levels of translation tables</title>
<updated>2014-07-23T14:27:40+00:00</updated>
<author>
<name>Jungseok Lee</name>
<email>jays.lee@samsung.com</email>
</author>
<published>2014-05-12T09:40:51+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=c79b954bf6c006f2d3dd9d01f231abeead13a410'/>
<id>urn:sha1:c79b954bf6c006f2d3dd9d01f231abeead13a410</id>
<content type='text'>
This patch implements 4 levels of translation tables since 3 levels
of page tables with 4KB pages cannot support 40-bit physical address
space described in [1] due to the following issue.

It is a restriction that kernel logical memory map with 4KB + 3 levels
(0xffffffc000000000-0xffffffffffffffff) cannot cover RAM region from
544GB to 1024GB in [1]. Specifically, ARM64 kernel fails to create
mapping for this region in map_mem function since __phys_to_virt for
this region reaches to address overflow.

If SoC design follows the document, [1], over 32GB RAM would be placed
from 544GB. Even 64GB system is supposed to use the region from 544GB
to 576GB for only 32GB RAM. Naturally, it would reach to enable 4 levels
of page tables to avoid hacking __virt_to_phys and __phys_to_virt.

However, it is recommended 4 levels of page table should be only enabled
if memory map is too sparse or there is about 512GB RAM.

References
----------
[1]: Principles of ARM Memory Maps, White Paper, Issue C

Signed-off-by: Jungseok Lee &lt;jays.lee@samsung.com&gt;
Reviewed-by: Sungjinn Chung &lt;sungjinn.chung@samsung.com&gt;
Acked-by: Kukjin Kim &lt;kgene.kim@samsung.com&gt;
Reviewed-by: Christoffer Dall &lt;christoffer.dall@linaro.org&gt;
Reviewed-by: Steve Capper &lt;steve.capper@linaro.org&gt;
[catalin.marinas@arm.com: MEMBLOCK_INITIAL_LIMIT removed, same as PUD_SIZE]
[catalin.marinas@arm.com: early_ioremap_init() updated for 4 levels]
[catalin.marinas@arm.com: 48-bit VA depends on BROKEN until KVM is fixed]
Signed-off-by: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
Tested-by: Jungseok Lee &lt;jungseoklee85@gmail.com&gt;
</content>
</entry>
<entry>
<title>arm64: Do not initialise the fixmap page tables in head.S</title>
<updated>2014-07-23T14:27:00+00:00</updated>
<author>
<name>Catalin Marinas</name>
<email>catalin.marinas@arm.com</email>
</author>
<published>2014-07-16T11:07:17+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=7edd88ad7e59c2b7b49da0e00f251884fb785d4f'/>
<id>urn:sha1:7edd88ad7e59c2b7b49da0e00f251884fb785d4f</id>
<content type='text'>
The early_ioremap_init() function already handles fixmap pte
initialisation, so upgrade this to cover all of pud/pmd/pte and remove
one page from swapper_pg_dir.

Signed-off-by: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
Tested-by: Jungseok Lee &lt;jungseoklee85@gmail.com&gt;
</content>
</entry>
<entry>
<title>arm64: add early_ioremap support</title>
<updated>2014-04-07T23:36:15+00:00</updated>
<author>
<name>Mark Salter</name>
<email>msalter@redhat.com</email>
</author>
<published>2014-04-07T22:39:52+00:00</published>
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<id>urn:sha1:bf4b558eba920a38f91beb5ee62a8ce2628c92f7</id>
<content type='text'>
Add support for early IO or memory mappings which are needed before the
normal ioremap() is usable.  This also adds fixmap support for permanent
fixed mappings such as that used by the earlyprintk device register
region.

Signed-off-by: Mark Salter &lt;msalter@redhat.com&gt;
Acked-by: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
Cc: Borislav Petkov &lt;borislav.petkov@amd.com&gt;
Cc: Dave Young &lt;dyoung@redhat.com&gt;
Cc: H. Peter Anvin &lt;hpa@zytor.com&gt;
Cc: Will Deacon &lt;will.deacon@arm.com&gt;
Cc: Ingo Molnar &lt;mingo@elte.hu&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Signed-off-by: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</content>
</entry>
<entry>
<title>arm64: allow ioremap_cache() to use existing RAM mappings</title>
<updated>2013-10-30T12:10:37+00:00</updated>
<author>
<name>Mark Salter</name>
<email>msalter@redhat.com</email>
</author>
<published>2013-10-24T14:54:17+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=c04e8e2fe5e0163fd37ccec7f538be8fa63be40e'/>
<id>urn:sha1:c04e8e2fe5e0163fd37ccec7f538be8fa63be40e</id>
<content type='text'>
Some drivers (ACPI notably) use ioremap_cache() to map an area which could
either be outside of kernel RAM or in an already mapped reserved area of
RAM. To avoid aliases with different caching attributes, ioremap() does
not allow RAM to be remapped. But for ioremap_cache(), the existing kernel
mapping may be used.

Signed-off-by: Mark Salter &lt;msalter@redhat.com&gt;
Signed-off-by: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
</content>
</entry>
<entry>
<title>arm64: Device specific operations</title>
<updated>2012-09-17T12:42:04+00:00</updated>
<author>
<name>Catalin Marinas</name>
<email>catalin.marinas@arm.com</email>
</author>
<published>2012-03-05T11:49:29+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=fc47897d2c65bc94b6868a5c914afbd33216e26f'/>
<id>urn:sha1:fc47897d2c65bc94b6868a5c914afbd33216e26f</id>
<content type='text'>
This patch adds several definitions for device communication, including
I/O accessors and ioremap(). The __raw_* accessors are implemented as
inline asm to avoid compiler generation of post-indexed accesses (less
efficient to emulate in a virtualised environment).

Signed-off-by: Will Deacon &lt;will.deacon@arm.com&gt;
Signed-off-by: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
Acked-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Acked-by: Tony Lindgren &lt;tony@atomide.com&gt;
Acked-by: Nicolas Pitre &lt;nico@linaro.org&gt;
Acked-by: Olof Johansson &lt;olof@lixom.net&gt;
Acked-by: Santosh Shilimkar &lt;santosh.shilimkar@ti.com&gt;
</content>
</entry>
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