<feed xmlns='http://www.w3.org/2005/Atom'>
<title>BMC/Intel-BMC/linux.git/arch/arm64/include/asm/opcodes.h, branch dev-4.3</title>
<subtitle>Intel OpenBMC Linux kernel source tree (mirror)</subtitle>
<id>https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev-4.3</id>
<link rel='self' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev-4.3'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/'/>
<updated>2014-11-20T16:33:45+00:00</updated>
<entry>
<title>arm64: Add AArch32 instruction set condition code checks</title>
<updated>2014-11-20T16:33:45+00:00</updated>
<author>
<name>Punit Agrawal</name>
<email>punit.agrawal@arm.com</email>
</author>
<published>2014-11-18T11:41:23+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=0be0e44c182c4f13df13903fd1377671d157d7b7'/>
<id>urn:sha1:0be0e44c182c4f13df13903fd1377671d157d7b7</id>
<content type='text'>
Port support for AArch32 instruction condition code checking from arm
to arm64.

Signed-off-by: Punit Agrawal &lt;punit.agrawal@arm.com&gt;
Reviewed-by: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
Signed-off-by: Will Deacon &lt;will.deacon@arm.com&gt;
</content>
</entry>
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