<feed xmlns='http://www.w3.org/2005/Atom'>
<title>BMC/Intel-BMC/linux.git/arch/arm64/include/asm/acpi.h, branch dev</title>
<subtitle>Intel OpenBMC Linux kernel source tree (mirror)</subtitle>
<id>https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev</id>
<link rel='self' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/'/>
<updated>2015-07-07T13:54:59+00:00</updated>
<entry>
<title>ACPI / ARM64: add BAD_MADT_GICC_ENTRY() macro</title>
<updated>2015-07-07T13:54:59+00:00</updated>
<author>
<name>Al Stone</name>
<email>al.stone@.linaro.org</email>
</author>
<published>2015-07-06T23:16:47+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=b6cfb277378ef831c0fa84bcff5049307294adc6'/>
<id>urn:sha1:b6cfb277378ef831c0fa84bcff5049307294adc6</id>
<content type='text'>
The BAD_MADT_ENTRY() macro is designed to work for all of the subtables
of the MADT.  In the ACPI 5.1 version of the spec, the struct for the
GICC subtable (struct acpi_madt_generic_interrupt) is 76 bytes long; in
ACPI 6.0, the struct is 80 bytes long.  But, there is only one definition
in ACPICA for this struct -- and that is the 6.0 version.  Hence, when
BAD_MADT_ENTRY() compares the struct size to the length in the GICC
subtable, it fails if 5.1 structs are in use, and there are systems in
the wild that have them.

This patch adds the BAD_MADT_GICC_ENTRY() that checks the GICC subtable
only, accounting for the difference in specification versions that are
possible.  The BAD_MADT_ENTRY() will continue to work as is for all other
MADT subtables.

This code is being added to an arm64 header file since that is currently
the only architecture using the GICC subtable of the MADT.  As a GIC is
specific to ARM, it is also unlikely the subtable will be used elsewhere.

Fixes: aeb823bbacc2 ("ACPICA: ACPI 6.0: Add changes for FADT table.")
Signed-off-by: Al Stone &lt;al.stone@linaro.org&gt;
Acked-by: Will Deacon &lt;will.deacon@arm.com&gt;
Acked-by: "Rafael J. Wysocki" &lt;rjw@rjwysocki.net&gt;
[catalin.marinas@arm.com: extra brackets around macro arguments]
Signed-off-by: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
</content>
</entry>
<entry>
<title>arm64: psci: remove ACPI coupling</title>
<updated>2015-05-27T12:22:24+00:00</updated>
<author>
<name>Mark Rutland</name>
<email>mark.rutland@arm.com</email>
</author>
<published>2015-04-30T13:22:04+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=c5a1330573c1748179898f4799f130e416ce4738'/>
<id>urn:sha1:c5a1330573c1748179898f4799f130e416ce4738</id>
<content type='text'>
The 32-bit ARM port doesn't have ACPI headers, and conditionally
including them is going to look horrendous. In preparation for sharing
the PSCI invocation code with 32-bit, move the acpi_psci_* function
declarations and definitions such that the PSCI client code need not
include ACPI headers.

While it would seem like we could simply hide the ACPI includes in
psci.h, the ACPI headers have hilarious circular dependencies which make
this infeasible without reorganising most of ACPICA. So rather than
doing that, move the acpi_psci_* prototypes into psci.h.

The psci_acpi_init function is made dependent on CONFIG_ACPI (with a
stub implementation in asm/psci.h) such that it need not be built for
32-bit ARM or kernels without ACPI support. The currently missing __init
annotations are added to the prototypes in the header.

Signed-off-by: Mark Rutland &lt;mark.rutland@arm.com&gt;
Acked-by: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
Acked-by: Hanjun Guo &lt;hanjun.guo@linaro.org&gt;
Reviewed-by: Al Stone &lt;al.stone@linaro.org&gt;
Reviewed-by: Ashwin Chaugule &lt;ashwin.chaugule@linaro.org&gt;
Tested-by: Hanjun Guo &lt;hanjun.guo@linaro.org&gt;
Cc: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;
Cc: Will Deacon &lt;will.deacon@arm.com&gt;
</content>
</entry>
<entry>
<title>ARM64: kernel: unify ACPI and DT cpus initialization</title>
<updated>2015-05-19T15:09:29+00:00</updated>
<author>
<name>Lorenzo Pieralisi</name>
<email>lorenzo.pieralisi@arm.com</email>
</author>
<published>2015-05-13T13:12:47+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=0f0783365cbb7ec13a8f02198f6e1a146d94a5a9'/>
<id>urn:sha1:0f0783365cbb7ec13a8f02198f6e1a146d94a5a9</id>
<content type='text'>
The code that initializes cpus on arm64 is currently split in two
different code paths that carry out DT and ACPI cpus initialization.

Most of the code executing SMP initialization is common and should
be merged to reduce discrepancies between ACPI and DT initialization
and to have code initializing cpus in a single common place in the
kernel.

This patch refactors arm64 SMP cpus initialization code to merge
ACPI and DT boot paths in a common file and to create sanity
checks that can be reused by both boot methods.

Current code assumes PSCI is the only available boot method
when arm64 boots with ACPI; this can be easily extended if/when
the ACPI parking protocol is merged into the kernel.

Signed-off-by: Sudeep Holla &lt;sudeep.holla@arm.com&gt;
Signed-off-by: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;
Acked-by: Hanjun Guo &lt;hanjun.guo@linaro.org&gt;
Acked-by: Mark Rutland &lt;mark.rutland@arm.com&gt;
Tested-by: Hanjun Guo &lt;hanjun.guo@linaro.org&gt;
Tested-by: Mark Rutland &lt;mark.rutland@arm.com&gt; [DT]
Cc: Will Deacon &lt;will.deacon@arm.com&gt;
Signed-off-by: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
</content>
</entry>
<entry>
<title>ARM64: kernel: acpi: honour acpi=force command line parameter</title>
<updated>2015-03-26T15:13:11+00:00</updated>
<author>
<name>Lorenzo Pieralisi</name>
<email>lorenzo.pieralisi@arm.com</email>
</author>
<published>2015-03-25T15:22:13+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=fb094eb19900937322848beaf1a622c6afb6250b'/>
<id>urn:sha1:fb094eb19900937322848beaf1a622c6afb6250b</id>
<content type='text'>
If acpi=force is passed on the command line, it forces ACPI to be
the only available boot method, hence it must be left enabled even
if the initialization and sanity checks on ACPI tables fails.

This patch refactors ACPI initialization to prevent disabling ACPI
if acpi=force is passed on the command line.

Signed-off-by: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;
Acked-by: Ard Biesheuvel &lt;ard.biesheuvel@linaro.org&gt;
Acked-by: Hanjun Guo &lt;hanjun.guo@linaro.org&gt;
Cc: Ard Biesheuvel &lt;ard.biesheuvel@linaro.org&gt;
Cc: Hanjun Guo &lt;hanjun.guo@linaro.org&gt;
Cc: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
Signed-off-by: Will Deacon &lt;will.deacon@arm.com&gt;
</content>
</entry>
<entry>
<title>ARM64 / ACPI: Don't unflatten device tree if acpi=force is passed</title>
<updated>2015-03-26T15:13:09+00:00</updated>
<author>
<name>Hanjun Guo</name>
<email>hanjun.guo@linaro.org</email>
</author>
<published>2015-03-24T14:02:56+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=33757ded074918eb49243968a82e7c9ec2d71720'/>
<id>urn:sha1:33757ded074918eb49243968a82e7c9ec2d71720</id>
<content type='text'>
Since the policy is that once we pass acpi=force in the early
param, we will not unflatten device tree even if ACPI is disabled
in ACPI table init fails, so fix the code by comparinging both
acpi_disabled and param_acpi_force before the device tree is
unflattened.

CC: Ard Biesheuvel &lt;ard.biesheuvel@linaro.org&gt;
Signed-off-by: Hanjun Guo &lt;hanjun.guo@linaro.org&gt;
Signed-off-by: Will Deacon &lt;will.deacon@arm.com&gt;
</content>
</entry>
<entry>
<title>irqchip: Add GICv2 specific ACPI boot support</title>
<updated>2015-03-26T15:13:07+00:00</updated>
<author>
<name>Tomasz Nowicki</name>
<email>tomasz.nowicki@linaro.org</email>
</author>
<published>2015-03-24T14:02:49+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=d60fc3892c4de4a25658786f941690462c5a5bab'/>
<id>urn:sha1:d60fc3892c4de4a25658786f941690462c5a5bab</id>
<content type='text'>
ACPI kernel uses MADT table for proper GIC initialization. It needs to
parse GIC related subtables, collect CPU interface and distributor
addresses and call driver initialization function (which is hardware
abstraction agnostic). In a similar way, FDT initialize GICv1/2.

NOTE: This commit allow to initialize GICv1/2 basic functionality.
While now simple GICv2 init call is used, any further GIC features
require generic infrastructure for proper ACPI irqchip initialization.
That mechanism and stacked irqdomains to support GICv2 MSI/virtualization
extension, GICv3/4 and its ITS are considered as next steps.

CC: Jason Cooper &lt;jason@lakedaemon.net&gt;
CC: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
CC: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Tested-by: Suravee Suthikulpanit &lt;Suravee.Suthikulpanit@amd.com&gt;
Tested-by: Yijing Wang &lt;wangyijing@huawei.com&gt;
Tested-by: Mark Langsdorf &lt;mlangsdo@redhat.com&gt;
Tested-by: Jon Masters &lt;jcm@redhat.com&gt;
Tested-by: Timur Tabi &lt;timur@codeaurora.org&gt;
Tested-by: Robert Richter &lt;rrichter@cavium.com&gt;
Acked-by: Robert Richter &lt;rrichter@cavium.com&gt;
Acked-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Acked-by: Jason Cooper &lt;jason@lakedaemon.net&gt;
Reviewed-by: Grant Likely &lt;grant.likely@linaro.org&gt;
Signed-off-by: Tomasz Nowicki &lt;tomasz.nowicki@linaro.org&gt;
Signed-off-by: Hanjun Guo &lt;hanjun.guo@linaro.org&gt;
Signed-off-by: Will Deacon &lt;will.deacon@arm.com&gt;
</content>
</entry>
<entry>
<title>ACPI / processor: Make it possible to get CPU hardware ID via GICC</title>
<updated>2015-03-26T15:13:07+00:00</updated>
<author>
<name>Hanjun Guo</name>
<email>hanjun.guo@linaro.org</email>
</author>
<published>2015-03-24T14:02:47+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=020295b4cb5b7d510ea1f4531a502c3f8a2380c5'/>
<id>urn:sha1:020295b4cb5b7d510ea1f4531a502c3f8a2380c5</id>
<content type='text'>
Introduce a new function map_gicc_mpidr() to allow MPIDRs to be obtained
from the GICC Structure introduced by ACPI 5.1, since MPIDR for ARM64 is
64-bit, so typedef u64 for phys_cpuid_t.

The ARM architecture defines the MPIDR register as the CPU hardware
identifier. This patch adds the code infrastructure to retrieve the MPIDR
values from the ARM ACPI GICC structure in order to look-up the kernel CPU
hardware ids required by the ACPI core code to identify CPUs.

CC: Rafael J. Wysocki &lt;rjw@rjwysocki.net&gt;
CC: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
CC: Will Deacon &lt;will.deacon@arm.com&gt;
Tested-by: Suravee Suthikulpanit &lt;Suravee.Suthikulpanit@amd.com&gt;
Tested-by: Yijing Wang &lt;wangyijing@huawei.com&gt;
Tested-by: Mark Langsdorf &lt;mlangsdo@redhat.com&gt;
Tested-by: Jon Masters &lt;jcm@redhat.com&gt;
Tested-by: Timur Tabi &lt;timur@codeaurora.org&gt;
Tested-by: Robert Richter &lt;rrichter@cavium.com&gt;
Acked-by: Robert Richter &lt;rrichter@cavium.com&gt;
Acked-by: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;
Acked-by: Rafael J. Wysocki &lt;rafael.j.wysocki@intel.com&gt;
Reviewed-by: Grant Likely &lt;grant.likely@linaro.org&gt;
Signed-off-by: Hanjun Guo &lt;hanjun.guo@linaro.org&gt;
Signed-off-by: Will Deacon &lt;will.deacon@arm.com&gt;
</content>
</entry>
<entry>
<title>ARM64 / ACPI: Parse MADT for SMP initialization</title>
<updated>2015-03-25T11:52:42+00:00</updated>
<author>
<name>Hanjun Guo</name>
<email>hanjun.guo@linaro.org</email>
</author>
<published>2015-03-24T14:02:45+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=fccb9a81fd08b61bed91ddef88341694f8ecbfd1'/>
<id>urn:sha1:fccb9a81fd08b61bed91ddef88341694f8ecbfd1</id>
<content type='text'>
MADT contains the information for MPIDR which is essential for
SMP initialization, parse the GIC cpu interface structures to
get the MPIDR value and map it to cpu_logical_map(), and add
enabled cpu with valid MPIDR into cpu_possible_map.

ACPI 5.1 only has two explicit methods to boot up SMP, PSCI and
Parking protocol, but the Parking protocol is only specified for
ARMv7 now, so make PSCI as the only way for the SMP boot protocol
before some updates for the ACPI spec or the Parking protocol spec.

Parking protocol patches for SMP boot will be sent to upstream when
the new version of Parking protocol is ready.

CC: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;
CC: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
CC: Will Deacon &lt;will.deacon@arm.com&gt;
CC: Mark Rutland &lt;mark.rutland@arm.com&gt;
Tested-by: Suravee Suthikulpanit &lt;Suravee.Suthikulpanit@amd.com&gt;
Tested-by: Yijing Wang &lt;wangyijing@huawei.com&gt;
Tested-by: Mark Langsdorf &lt;mlangsdo@redhat.com&gt;
Tested-by: Jon Masters &lt;jcm@redhat.com&gt;
Tested-by: Timur Tabi &lt;timur@codeaurora.org&gt;
Tested-by: Robert Richter &lt;rrichter@cavium.com&gt;
Acked-by: Robert Richter &lt;rrichter@cavium.com&gt;
Acked-by: Olof Johansson &lt;olof@lixom.net&gt;
Reviewed-by: Grant Likely &lt;grant.likely@linaro.org&gt;
Signed-off-by: Hanjun Guo &lt;hanjun.guo@linaro.org&gt;
Signed-off-by: Tomasz Nowicki &lt;tomasz.nowicki@linaro.org&gt;
Signed-off-by: Will Deacon &lt;will.deacon@arm.com&gt;
</content>
</entry>
<entry>
<title>ARM64 / ACPI: Get PSCI flags in FADT for PSCI init</title>
<updated>2015-03-25T11:49:31+00:00</updated>
<author>
<name>Graeme Gregory</name>
<email>graeme.gregory@linaro.org</email>
</author>
<published>2015-03-24T14:02:43+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=7c59a3df15df29c8402a05b92385e83e55355778'/>
<id>urn:sha1:7c59a3df15df29c8402a05b92385e83e55355778</id>
<content type='text'>
There are two flags: PSCI_COMPLIANT and PSCI_USE_HVC. When set,
the former signals to the OS that the firmware is PSCI compliant.
The latter selects the appropriate conduit for PSCI calls by
toggling between Hypervisor Calls (HVC) and Secure Monitor Calls
(SMC).

FADT table contains such information in ACPI 5.1, FADT table was
parsed in ACPI table init and copy to struct acpi_gbl_FADT, so
use the flags in struct acpi_gbl_FADT for PSCI init.

Since ACPI 5.1 doesn't support self defined PSCI function IDs,
which means that only PSCI 0.2+ is supported in ACPI.

CC: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;
CC: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
CC: Will Deacon &lt;will.deacon@arm.com&gt;
Tested-by: Suravee Suthikulpanit &lt;Suravee.Suthikulpanit@amd.com&gt;
Tested-by: Yijing Wang &lt;wangyijing@huawei.com&gt;
Tested-by: Mark Langsdorf &lt;mlangsdo@redhat.com&gt;
Tested-by: Jon Masters &lt;jcm@redhat.com&gt;
Tested-by: Timur Tabi &lt;timur@codeaurora.org&gt;
Tested-by: Robert Richter &lt;rrichter@cavium.com&gt;
Acked-by: Robert Richter &lt;rrichter@cavium.com&gt;
Acked-by: Olof Johansson &lt;olof@lixom.net&gt;
Acked-by: Grant Likely &lt;grant.likely@linaro.org&gt;
Signed-off-by: Graeme Gregory &lt;graeme.gregory@linaro.org&gt;
Signed-off-by: Tomasz Nowicki &lt;tomasz.nowicki@linaro.org&gt;
Signed-off-by: Hanjun Guo &lt;hanjun.guo@linaro.org&gt;
Signed-off-by: Will Deacon &lt;will.deacon@arm.com&gt;
</content>
</entry>
<entry>
<title>ARM64 / ACPI: Introduce early_param "acpi=" to enable/disable ACPI</title>
<updated>2015-03-25T11:49:31+00:00</updated>
<author>
<name>Al Stone</name>
<email>al.stone@linaro.org</email>
</author>
<published>2015-03-24T14:02:41+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=b10d79f76085b577673395daf92d6208ae09196f'/>
<id>urn:sha1:b10d79f76085b577673395daf92d6208ae09196f</id>
<content type='text'>
This implements the following policy to decide whether ACPI should
be used to boot the system:
- acpi=off: ACPI will not be used to boot the system, even if there is
  no alternative available (e.g., device tree is empty)
- acpi=force: only ACPI will be used to boot the system; if that fails,
  there will be no fallback to alternative methods (such as device tree)
- otherwise, ACPI will be used as a fallback if the device tree turns out
  to lack a platform description; the heuristic to decide this is whether
  /chosen is the only node present at depth 1

CC: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
CC: Will Deacon &lt;will.deacon@arm.com&gt;
CC: Rafael J. Wysocki &lt;rjw@rjwysocki.net&gt;
Acked-by: Olof Johansson &lt;olof@lixom.net&gt;
Acked-by: Grant Likely &lt;grant.likely@linaro.org&gt;
Tested-by: Timur Tabi &lt;timur@codeaurora.org&gt;
Signed-off-by: Al Stone &lt;al.stone@linaro.org&gt;
Signed-off-by: Graeme Gregory &lt;graeme.gregory@linaro.org&gt;
Signed-off-by: Hanjun Guo &lt;hanjun.guo@linaro.org&gt;
Signed-off-by: Ard Biesheuvel &lt;ard.biesheuvel@linaro.org&gt;
Signed-off-by: Will Deacon &lt;will.deacon@arm.com&gt;
</content>
</entry>
</feed>
