Intel OpenBMC Linux kernel source tree (mirror) https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev 2015-07-07T16:15:39+00:00 2015-07-07T16:15:39+00:00 Catalin Marinas catalin.marinas@arm.com 2015-07-07T16:15:39+00:00 urn:sha1:ef37566cf8d607844cee5a01597d828c8fd1a501 Move EDAC_SUPPORT to the right place. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> 2015-06-26T18:34:35+00:00 Linus Torvalds torvalds@linux-foundation.org 2015-06-26T18:34:35+00:00 urn:sha1:4aa705b18bf17c4ff33ff7bbcd3f0c596443fa81 Pull ARM SoC platform support updates from Kevin Hilman: "Our SoC branch usually contains expanded support for new SoCs and other core platform code. Some highlights from this round: - sunxi: SMP support for A23 SoC - socpga: big-endian support - pxa: conversion to common clock framework - bcm: SMP support for BCM63138 - imx: support new I.MX7D SoC - zte: basic support for ZX296702 SoC" * tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (134 commits) ARM: zx: Add basic defconfig support for ZX296702 ARM: dts: zx: add an initial zx296702 dts and doc clk: zx: add clock support to zx296702 dt-bindings: Add #defines for ZTE ZX296702 clocks ARM: socfpga: fix build error due to secondary_startup MAINTAINERS: ARM64: EXYNOS: Extend entry for ARM64 DTS ARM: ep93xx: simone: support for SPI-based MMC/SD cards MAINTAINERS: update Shawn's email to use kernel.org one ARM: socfpga: support suspend to ram ARM: socfpga: add CPU_METHOD_OF_DECLARE for Arria 10 ARM: socfpga: use CPU_METHOD_OF_DECLARE for socfpga_cyclone5 ARM: EXYNOS: register power domain driver from core_initcall ARM: EXYNOS: use PS_HOLD based poweroff for all supported SoCs ARM: SAMSUNG: Constify platform_device_id ARM: EXYNOS: Constify irq_domain_ops ARM: EXYNOS: add coupled cpuidle support for Exynos3250 ARM: EXYNOS: add exynos_get_boot_addr() helper ARM: EXYNOS: add exynos_set_boot_addr() helper ARM: EXYNOS: make exynos_core_restart() less verbose ARM: EXYNOS: fix exynos_boot_secondary() return value on timeout ... 2015-06-25T02:52:06+00:00 Linus Torvalds torvalds@linux-foundation.org 2015-06-25T02:52:06+00:00 urn:sha1:45471cd98decae5fced8b38e46c223f54a924814 Pull EDAC updates from Borislav Petkov: - New APM X-Gene SoC EDAC driver (Loc Ho) - AMD error injection module improvements (Aravind Gopalakrishnan) - Altera Arria 10 support (Thor Thayer) - misc fixes and cleanups all over the place * tag 'edac_for_4.2_2' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp: (28 commits) EDAC: Update Documentation/edac.txt EDAC: Fix typos in Documentation/edac.txt EDAC, mce_amd_inj: Set MISCV on injection EDAC, mce_amd_inj: Move bit preparations before the injection EDAC, mce_amd_inj: Cleanup and simplify README EDAC, altera: Do not allow suspend when EDAC is enabled EDAC, mce_amd_inj: Make inj_type static arm: socfpga: dts: Add Arria10 SDRAM EDAC DTS support EDAC, altera: Add Arria10 EDAC support EDAC, altera: Refactor for Altera CycloneV SoC EDAC, altera: Generalize driver to use DT Memory size EDAC, mce_amd_inj: Add README file EDAC, mce_amd_inj: Add individual permissions field to dfs_node EDAC, mce_amd_inj: Modify flags attribute to use string arguments EDAC, mce_amd_inj: Read out number of MCE banks from the hardware EDAC, mce_amd_inj: Use MCE_INJECT_GET macro for bank node too EDAC, xgene: Fix cpuid abuse EDAC, mpc85xx: Extend error address to 64 bit EDAC, mpc8xxx: Adapt for FSL SoC EDAC, edac_stub: Drop arch-specific include ... 2015-06-24T17:02:15+00:00 Linus Torvalds torvalds@linux-foundation.org 2015-06-24T17:02:15+00:00 urn:sha1:e3d8238d7f5c3f539a29f5ac596cd342d847e099 Pull arm64 updates from Catalin Marinas: "Mostly refactoring/clean-up: - CPU ops and PSCI (Power State Coordination Interface) refactoring following the merging of the arm64 ACPI support, together with handling of Trusted (secure) OS instances - Using fixmap for permanent FDT mapping, removing the initial dtb placement requirements (within 512MB from the start of the kernel image). This required moving the FDT self reservation out of the memreserve processing - Idmap (1:1 mapping used for MMU on/off) handling clean-up - Removing flush_cache_all() - not safe on ARM unless the MMU is off. Last stages of CPU power down/up are handled by firmware already - "Alternatives" (run-time code patching) refactoring and support for immediate branch patching, GICv3 CPU interface access - User faults handling clean-up And some fixes: - Fix for VDSO building with broken ELF toolchains - Fix another case of init_mm.pgd usage for user mappings (during ASID roll-over broadcasting) - Fix for FPSIMD reloading after CPU hotplug - Fix for missing syscall trace exit - Workaround for .inst asm bug - Compat fix for switching the user tls tpidr_el0 register" * tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: (42 commits) arm64: use private ratelimit state along with show_unhandled_signals arm64: show unhandled SP/PC alignment faults arm64: vdso: work-around broken ELF toolchains in Makefile arm64: kernel: rename __cpu_suspend to keep it aligned with arm arm64: compat: print compat_sp instead of sp arm64: mm: Fix freeing of the wrong memmap entries with !SPARSEMEM_VMEMMAP arm64: entry: fix context tracking for el0_sp_pc arm64: defconfig: enable memtest arm64: mm: remove reference to tlb.S from comment block arm64: Do not attempt to use init_mm in reset_context() arm64: KVM: Switch vgic save/restore to alternative_insn arm64: alternative: Introduce feature for GICv3 CPU interface arm64: psci: fix !CONFIG_HOTPLUG_CPU build warning arm64: fix bug for reloading FPSIMD state after CPU hotplug. arm64: kernel thread don't need to save fpsimd context. arm64: fix missing syscall trace exit arm64: alternative: Work around .inst assembler bugs arm64: alternative: Merge alternative-asm.h into alternative.h arm64: alternative: Allow immediate branch as alternative instruction arm64: Rework alternate sequence for ARM erratum 845719 ... 2015-06-15T12:40:49+00:00 Suthikulpanit, Suravee Suravee.Suthikulpanit@amd.com 2015-06-10T16:08:53+00:00 urn:sha1:b6197b93fa4bcba9313cc415934e3fe27e2db9b0 section 6.2.17 _CCA states that ARM platforms require ACPI _CCA object to be specified for DMA-cabpable devices. Therefore, this patch specifies ACPI_CCA_REQUIRED in arm64 Kconfig. In addition, to handle the case when _CCA is missing, arm64 would assign dummy_dma_ops to disable DMA capability of the device. Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Mark Salter <msalter@redhat.com> Signed-off-by: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> 2015-06-11T00:07:15+00:00 Kevin Hilman khilman@linaro.org 2015-06-11T00:07:15+00:00 urn:sha1:259413afbf21c5e774e5aa2c633257b2952ece31 ARM64: Hisilicon ARM64 SoC Updates for V4.2 - Added Hisilicon ARM64 SoC family support in Kconfig and defconfig * tag 'hi6220-soc-for-4.2' of git://github.com/hisilicon/linux-hisi: arm64: Enable Hisilicon ARMv8 SoC family in Kconfig and defconfig 2015-06-05T15:01:17+00:00 Bintian Wang bintian.wang@huawei.com 2015-01-06T01:30:36+00:00 urn:sha1:85fe946e8c8485d868edcbdcef78f04e4a259a6a This patch introduces ARCH_HISI to enable Hisilicon SoC family in Kconfig and defconfig. Signed-off-by: Bintian Wang <bintian.wang@huawei.com> Acked-by: Haojian Zhuang <haojian.zhuang@linaro.org> Reviewed-by: Wei Xu <xuwei5@hisilicon.com> Tested-by: Will Deacon <will.deacon@arm.com> Tested-by: Tyler Baker <tyler.baker@linaro.org> Tested-by: Kevin Hilman <khilman@linaro.org> Acked-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com> 2015-05-29T09:33:26+00:00 Loc Ho lho@apm.com 2015-05-22T23:32:56+00:00 urn:sha1:6e681abc88376ae448071cbaa9445c20f2812368 Select EDAC_SUPPORT for arm64. Signed-off-by: Loc Ho <lho@apm.com> Cc: devicetree@vger.kernel.org Cc: dougthompson@xmission.com Cc: ijc+devicetree@hellion.org.uk Cc: jcm@redhat.com Cc: linux-arm-kernel@lists.infradead.org Cc: linux-edac <linux-edac@vger.kernel.org> Cc: mark.rutland@arm.com Cc: mchehab@osg.samsung.com Cc: patches@apm.com Cc: robh+dt@kernel.org Link: http://lkml.kernel.org/r/1432337580-3750-2-git-send-email-lho@apm.com Signed-off-by: Borislav Petkov <bp@suse.de> 2015-05-19T14:27:42+00:00 Anders Roxell anders.roxell@linaro.org 2015-04-27T20:53:09+00:00 urn:sha1:e8557d1f0c4d06260b8aed5d2400806a8e7ac21c Now its safe to allow forced interrupt threading for arm64, all timer interrupts and the perf interrupt are marked NO_THREAD, as is the case with arch/arm: da0ec6f ARM: 7814/2: Allow forced irq threading Acked-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Suggested-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Anders Roxell <anders.roxell@linaro.org> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> 2015-04-27T10:39:05+00:00 Sudeep Holla sudeep.holla@arm.com 2015-04-22T17:16:33+00:00 urn:sha1:6544e67bfb1bf55bcf3c0f6b37631917e9acfb74 Since several interrupt controllers including GIC support both edge and level triggered interrupts, it's useful to provide that information in /proc/interrupts even on ARM64 similar to ARM and PPC. This is based on Geert Uytterhoeven's commit 7c07005eea96 ("ARM: 8339/1: Enable CONFIG_GENERIC_IRQ_SHOW_LEVEL") Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>