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<title>BMC/Intel-BMC/linux.git/arch/arm/mach-rockchip, branch dev</title>
<subtitle>Intel OpenBMC Linux kernel source tree (mirror)</subtitle>
<id>https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev</id>
<link rel='self' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev'/>
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<updated>2015-07-02T16:54:14+00:00</updated>
<entry>
<title>Merge tag 'cpuinit-v4.1-rc8' of git://git.kernel.org/pub/scm/linux/kernel/git/paulg/linux</title>
<updated>2015-07-02T16:54:14+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2015-07-02T16:54:14+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=47f92418c7916a71c985444100bfe68aed61e247'/>
<id>urn:sha1:47f92418c7916a71c985444100bfe68aed61e247</id>
<content type='text'>
Pull __cpuinit removal from Paul Gortmaker:
 "Remove __cpuinit macros and users.

  We removed the __cpuinit stuff in 3.11-rc1 with commit 22f0a2736774
  ("init.h: remove __cpuinit sections from the kernel") but we left some
  no-op stubs as a courtesy to unmerged code.

  Here we get rid of the stubs as well, since (as can be seen in these
  changes) they are enabling use cases to sneak back in, primarily from
  older BSP code that has been living out of tree for some time prior to
  getting mainlined.  So we get rid of these "new" users 1st and then
  get rid of the stubs.

  Obviously, getting rid of the stubs can't happen until all the users
  are gone, so I had to keep this together as a series, even though some
  of these commits since got picked up into maintainers trees as well.

  The nature of this change is such that it should have zero impact on
  the generated runtime.

  This is one of several independent cleanup branches aimed at enabling
  better organization in the init.h and module.h code.  They have been
  getting coverage in the linux-next tree for the last month, in
  addition to my local testing, which also covers approximately a half
  dozen or more architectures"

* tag 'cpuinit-v4.1-rc8' of git://git.kernel.org/pub/scm/linux/kernel/git/paulg/linux:
  init: delete the __cpuinit related stubs
  kernel/cpu.c: remove new instance of __cpuinit that crept back in
  sched/core: remove __cpuinit section tag that crept back in.
  mips/mm/tlbex: remove new instance of __cpuinit that crept back in
  mips/c-r4k: remove legacy __cpuinit section that crept in
  mips/bcm77xx: remove legacy __cpuinit sections that crept in
  mips/ath25: remove legacy __cpuinit section that crept in
  arm/mach-hisi: remove legacy __CPUINIT section that crept in
  arm/mach-rockchip: remove legacy __cpuinit section that crept in
  arm/mach-mvebu: remove legacy __cpuinit sections that crept in
  arm/mach-keystone: remove legacy __cpuinit sections that crept in
</content>
</entry>
<entry>
<title>Merge tag 'armsoc-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc</title>
<updated>2015-06-26T18:08:27+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2015-06-26T18:08:27+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=c11d716218910c3aa2bac1bb641e6086ad649555'/>
<id>urn:sha1:c11d716218910c3aa2bac1bb641e6086ad649555</id>
<content type='text'>
Pull ARM SoC cleanups from Kevin Hilman:
 "A relatively small setup of cleanups this time around, and similar to
  last time the bulk of it is removal of legacy board support:

   - OMAP: removal of legacy (non-DT) booting for several platforms

   - i.MX: remove some legacy board files"

* tag 'armsoc-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (36 commits)
  ARM: fix EFM32 build breakage caused by cpu_resume_arm
  ARM: 8389/1: Add cpu_resume_arm() for firmwares that resume in ARM state
  ARM: v7 setup function should invalidate L1 cache
  mach-omap2: Remove use of deprecated marco, PTR_RET in devices.c
  ARM: OMAP2+: Remove calls to deprecacted marco,PTR_RET in the files,fb.c and pmu.c
  ARM: OMAP2+: Constify irq_domain_ops
  ARM: OMAP2+: use symbolic defines for console loglevels instead of numbers
  ARM: at91: remove useless Makefile.boot
  ARM: at91: remove at91rm9200_sdramc.h
  ARM: at91: remove mach/at91_ramc.h and mach/at91rm9200_mc.h
  ARM: at91/pm: use the atmel-mc syscon defines
  pcmcia: at91_cf: Use syscon to configure the MC/smc
  ARM: at91: declare the at91rm9200 memory controller as a syscon
  mfd: syscon: Add Atmel MC (Memory Controller) registers definition
  ARM: at91: drop sam9_smc.c
  ata: at91: use syscon to configure the smc
  ARM: ux500: delete static resource defines
  ARM: ux500: rename ux500_map_io
  ARM: ux500: look up PRCMU resource from DT
  ARM: ux500: kill off L2CC static map
  ...
</content>
</entry>
<entry>
<title>arm/mach-rockchip: remove legacy __cpuinit section that crept in</title>
<updated>2015-06-16T18:12:21+00:00</updated>
<author>
<name>Paul Gortmaker</name>
<email>paul.gortmaker@windriver.com</email>
</author>
<published>2015-01-17T21:48:41+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=374d4dd3ef1a3ebac33a7df5f8f2e7b5fbd7ec05'/>
<id>urn:sha1:374d4dd3ef1a3ebac33a7df5f8f2e7b5fbd7ec05</id>
<content type='text'>
We removed __cpuinit support (leaving no-op stubs) quite some time ago.
However this one crept back in as of commit a7a2b3118b410fb3cd3a8363b1
("ARM: rockchip: add smp bringup code").

Since we want to clobber the stubs soon, get this removed now.

Cc: Heiko Stuebner &lt;heiko@sntech.de&gt;
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Paul Gortmaker &lt;paul.gortmaker@windriver.com&gt;
</content>
</entry>
<entry>
<title>Merge branch 'for-arm-soc' of http://ftp.arm.linux.org.uk/pub/armlinux/kernel/git-cur/linux-2.6-arm into next/cleanup</title>
<updated>2015-06-12T20:40:12+00:00</updated>
<author>
<name>Kevin Hilman</name>
<email>khilman@linaro.org</email>
</author>
<published>2015-06-12T20:40:12+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=e75ea4569d6d1d10935d74ff80bad52dc09bd062'/>
<id>urn:sha1:e75ea4569d6d1d10935d74ff80bad52dc09bd062</id>
<content type='text'>
* 'for-arm-soc' of http://ftp.arm.linux.org.uk/pub/armlinux/kernel/git-cur/linux-2.6-arm:
  ARM: fix EFM32 build breakage caused by cpu_resume_arm
  ARM: 8389/1: Add cpu_resume_arm() for firmwares that resume in ARM state
  ARM: v7 setup function should invalidate L1 cache
</content>
</entry>
<entry>
<title>ARM: v7 setup function should invalidate L1 cache</title>
<updated>2015-06-01T10:30:26+00:00</updated>
<author>
<name>Russell King</name>
<email>rmk+kernel@arm.linux.org.uk</email>
</author>
<published>2015-05-19T16:06:44+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=02b4e2756e01c623cc4dbceae4b07be75252db5b'/>
<id>urn:sha1:02b4e2756e01c623cc4dbceae4b07be75252db5b</id>
<content type='text'>
All ARMv5 and older CPUs invalidate their caches in the early assembly
setup function, prior to enabling the MMU.  This is because the L1
cache should not contain any data relevant to the execution of the
kernel at this point; all data should have been flushed out to memory.

This requirement should also be true for ARMv6 and ARMv7 CPUs - indeed,
these typically do not search their caches when caching is disabled (as
it needs to be when the MMU is disabled) so this change should be safe.

ARMv7 allows there to be CPUs which search their caches while caching is
disabled, and it's permitted that the cache is uninitialised at boot;
for these, the architecture reference manual requires that an
implementation specific code sequence is used immediately after reset
to ensure that the cache is placed into a sane state.  Such
functionality is definitely outside the remit of the Linux kernel, and
must be done by the SoC's firmware before _any_ CPU gets to the Linux
kernel.

Changing the data cache clean+invalidate to a mere invalidate allows us
to get rid of a lot of platform specific hacks around this issue for
their secondary CPU bringup paths - some of which were buggy.

Reviewed-by: Florian Fainelli &lt;f.fainelli@gmail.com&gt;
Tested-by: Florian Fainelli &lt;f.fainelli@gmail.com&gt;
Tested-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
Tested-by: Dinh Nguyen &lt;dinguyen@opensource.altera.com&gt;
Acked-by: Sebastian Hesselbarth &lt;sebastian.hesselbarth@gmail.com&gt;
Tested-by: Sebastian Hesselbarth &lt;sebastian.hesselbarth@gmail.com&gt;
Acked-by: Shawn Guo &lt;shawn.guo@linaro.org&gt;
Tested-by: Thierry Reding &lt;treding@nvidia.com&gt;
Acked-by: Thierry Reding &lt;treding@nvidia.com&gt;
Tested-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Tested-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
Tested-by: Wei Xu &lt;xuwei5@hisilicon.com&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
</entry>
<entry>
<title>Revert "ARM: rockchip: fix undefined instruction of reset_ctrl_regs"</title>
<updated>2015-05-13T13:47:03+00:00</updated>
<author>
<name>Heiko Stuebner</name>
<email>heiko@sntech.de</email>
</author>
<published>2015-05-13T13:47:03+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=3f937cf3db466093c533efbcd601952509727a9d'/>
<id>urn:sha1:3f937cf3db466093c533efbcd601952509727a9d</id>
<content type='text'>
This reverts commit b403125d3bbf8046c1186e1a49cb17bb5551db14.

As reported by Chris, both commits
        b403125 "ARM: rockchip: fix undefined instruction of reset_ctrl_regs"
        0ea001d "ARM: rockchip: disable dapswjdp during suspend"
actually fix the same issue and b403125 is the older one, which got
superseded by 0ea001d. Therefore revert the obsolete one again.

Reported-by: Chris Zhong &lt;zyw@rock-chips.com&gt;
Signed-off-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
</content>
</entry>
<entry>
<title>rockchip: make sure timer7 is enabled on rk3288 platforms</title>
<updated>2015-04-16T19:22:17+00:00</updated>
<author>
<name>Heiko Stuebner</name>
<email>heiko@sntech.de</email>
</author>
<published>2015-01-20T22:47:30+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=2a9fe3ca84afff6259820c4f62e579f41476becc'/>
<id>urn:sha1:2a9fe3ca84afff6259820c4f62e579f41476becc</id>
<content type='text'>
timer7 supplies the architected timer and thus as has to run when
the system clocksource and clockevents drivers are registered.

While it should be the responsibility of the bootloader to do this,
and there exists a fix in a community u-boot, all u-boot based systems
that actually shipped have the mentioned issue.

Therefore to not require every developer to update their u-boot, add a
snippet for this, enabling the timer early in the kernel.

Signed-off-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
</content>
</entry>
<entry>
<title>ARM: rockchip: fix undefined instruction of reset_ctrl_regs</title>
<updated>2015-04-16T19:17:26+00:00</updated>
<author>
<name>Chris Zhong</name>
<email>zyw@rock-chips.com</email>
</author>
<published>2015-03-21T16:04:51+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=b403125d3bbf8046c1186e1a49cb17bb5551db14'/>
<id>urn:sha1:b403125d3bbf8046c1186e1a49cb17bb5551db14</id>
<content type='text'>
Sometimes the debug module may not work well after resume, since it has
not been correctly reset when wakeup from suspend. That cause system
crash during reusme, and a 'undefined instruction' is displayed on the
console. Set the GRF_FORCE_JTAG bit of RK3288_GRF_SOC_CON0 can ensure
that debug modul is reset. And we can change the value of
RK3288_GRF_SOC_CON0 back when system resume.

Signed-off-by: Chris Zhong &lt;zyw@rock-chips.com&gt;
Tested-by: Caesar Wang &lt;wxt@rock-chips.com&gt;
Reviewed-by: Douglas Anderson &lt;dianders@chromium.org&gt;

According to discussions, there does not seem a better solution available.
Please also see the potential security implication described in the
comment inline in the code.

Signed-off-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
</content>
</entry>
<entry>
<title>ARM: rockchip: disable dapswjdp during suspend</title>
<updated>2015-04-16T19:15:47+00:00</updated>
<author>
<name>Chris Zhong</name>
<email>zyw@rock-chips.com</email>
</author>
<published>2015-04-15T05:57:11+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=0ea001d3b43cc9d387c093ae205c4228cd88a886'/>
<id>urn:sha1:0ea001d3b43cc9d387c093ae205c4228cd88a886</id>
<content type='text'>
Reset dapswjdp is controlled by JTAG_TRSTN, if the iomux of this pin is
not "jtag_trstn". the AP would think this pin is always high, so it can
not reset before resume. When system resume, but the dapswjdp is not in
a default state, it may Access some illegal address, it cause system
crash during resume.
Let's disable this jtag function by clear the dapdeviceen bit, it
prohibit the dapswjdp to access memory and registers. This bit would
be enable in MASKROM, so we need clear it in suspend everytime.

Signed-off-by: Chris Zhong &lt;zyw@rock-chips.com&gt;
Reviewed-by: Doug Anderson &lt;dianders@chromium.org&gt;
Signed-off-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
</content>
</entry>
<entry>
<title>ARM: rockchip: disable watchdog during suspend</title>
<updated>2015-03-11T21:41:02+00:00</updated>
<author>
<name>Chris Zhong</name>
<email>zyw@rock-chips.com</email>
</author>
<published>2015-02-09T13:12:23+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=a0307d186f5015ee3d77e209e5c06190cbf02478'/>
<id>urn:sha1:a0307d186f5015ee3d77e209e5c06190cbf02478</id>
<content type='text'>
The watchdog clock should be disable in dw_wdt_suspend, but we set a
dummy clock to watchdog for rk3288. So the watchdog will continue to
work during suspend. And we switch the system clock to 32khz from 24Mhz,
during suspend, so the watchdog timer over count will increase to
755 times, about 12.5 hours, the original value is 60 seconds. So
watchdog will reset the system over a night,  but voltage are all
incorrect, then it hang on reset.

Signed-off-by: Chris Zhong &lt;zyw@rock-chips.com&gt;
Signed-off-by: Daniel Kurtz &lt;djkurtz@google.com&gt;
Reviewed-by: Doug Anderson &lt;dianders@chromium.org&gt;
Tested-by: Doug Anderson &lt;dianders@chromium.org&gt;
Signed-off-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
</content>
</entry>
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