<feed xmlns='http://www.w3.org/2005/Atom'>
<title>BMC/Intel-BMC/linux.git/arch/arm/mach-pxa/include, branch dev</title>
<subtitle>Intel OpenBMC Linux kernel source tree (mirror)</subtitle>
<id>https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev</id>
<link rel='self' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev'/>
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<updated>2015-04-30T20:52:51+00:00</updated>
<entry>
<title>ARM: pxa: lubbock: use new pxa_cplds driver</title>
<updated>2015-04-30T20:52:51+00:00</updated>
<author>
<name>Robert Jarzmik</name>
<email>robert.jarzmik@free.fr</email>
</author>
<published>2014-12-14T22:04:14+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=fc9e38c0f4d38bfc68b405cf48365d65f7b6319e'/>
<id>urn:sha1:fc9e38c0f4d38bfc68b405cf48365d65f7b6319e</id>
<content type='text'>
As the interrupt handling was transferred to the pxa_cplds driver,
make the switch in lubbock platform code.

Fixes: 157d2644cb0c ("ARM: pxa: change gpio to platform device")
Signed-off-by: Robert Jarzmik &lt;robert.jarzmik@free.fr&gt;
Acked-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
</entry>
<entry>
<title>ARM: pxa: mainstone: use new pxa_cplds driver</title>
<updated>2015-04-30T20:52:31+00:00</updated>
<author>
<name>Robert Jarzmik</name>
<email>robert.jarzmik@free.fr</email>
</author>
<published>2015-04-24T21:22:35+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=277688639f98a9e34a6f109f9cd6129f92e718c1'/>
<id>urn:sha1:277688639f98a9e34a6f109f9cd6129f92e718c1</id>
<content type='text'>
As the interrupt handling was transferred to the pxa_cplds driver,
make the switch in mainstone platform code.

Fixes: 157d2644cb0c ("ARM: pxa: change gpio to platform device")
Signed-off-by: Robert Jarzmik &lt;robert.jarzmik@free.fr&gt;
Acked-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
</entry>
<entry>
<title>ARM: pxa: fix broken isa interrupts for zeus and viper</title>
<updated>2015-01-27T22:53:07+00:00</updated>
<author>
<name>Robert Jarzmik</name>
<email>robert.jarzmik@free.fr</email>
</author>
<published>2015-01-27T05:55:10+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=33a5b8838e4973a2f6c4ec4a9b8b26f4589bc07a'/>
<id>urn:sha1:33a5b8838e4973a2f6c4ec4a9b8b26f4589bc07a</id>
<content type='text'>
Commit "ARM: pxa: arbitrarily set first interrupt number" broke viper
and zeus boards which still refer to PXA_ISA_IRQ() macro. Redefine
the macro, which declares the legacy interrupts from 0 to 15.

Signed-off-by: Robert Jarzmik &lt;robert.jarzmik@free.fr&gt;
Signed-off-by: Olof Johansson &lt;olof@lixom.net&gt;
</content>
</entry>
<entry>
<title>ARM: pxa: arbitrarily set first interrupt number</title>
<updated>2014-12-26T17:03:20+00:00</updated>
<author>
<name>Robert Jarzmik</name>
<email>robert.jarzmik@free.fr</email>
</author>
<published>2014-11-24T22:18:22+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=3ad32229bed9953dd2085ef992adb161ed0c9194'/>
<id>urn:sha1:3ad32229bed9953dd2085ef992adb161ed0c9194</id>
<content type='text'>
As IRQ0, the legacy timer interrupt  should not be used as an interrupt
number, shift the interrupts by a fixed number.

As we had in a special case a shift of 16 when ISA bus was used on a
PXA, use that value as the first interrupt number, regardless of ISA or
not.

Signed-off-by: Robert Jarzmik &lt;robert.jarzmik@free.fr&gt;
</content>
</entry>
<entry>
<title>Merge tag 'soc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc</title>
<updated>2014-12-09T22:38:28+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2014-12-09T22:38:28+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=6cd94d5e57ab97ddd672b707ab4bb639672c1727'/>
<id>urn:sha1:6cd94d5e57ab97ddd672b707ab4bb639672c1727</id>
<content type='text'>
Pull ARM SoC platform changes from Arnd Bergmann:
 "New and updated SoC support, notable changes include:

   - bcm:
        brcmstb SMP support
        initial iproc/cygnus support
   - exynos:
        Exynos4415 SoC support
        PMU and suspend support for Exynos5420
        PMU support for Exynos3250
        pm related maintenance
   - imx:
        new LS1021A SoC support
        vybrid 610 global timer support
   - integrator:
        convert to using multiplatform configuration
   - mediatek:
        earlyprintk support for mt8127/mt8135
   - meson:
        meson8 soc and l2 cache controller support
   - mvebu:
        Armada 38x CPU hotplug support
        drop support for prerelease Armada 375 Z1 stepping
        extended suspend support, now works on Armada 370/XP
   - omap:
        hwmod related maintenance
        prcm cleanup
   - pxa:
        initial pxa27x DT handling
   - rockchip:
        SMP support for rk3288
        add cpu frequency scaling support
   - shmobile:
        r8a7740 power domain support
        various small restart, timer, pci apmu changes
   - sunxi:
        Allwinner A80 (sun9i) earlyprintk support
   - ux500:
        power domain support

  Overall, a significant chunk of changes, coming mostly from the usual
  suspects: omap, shmobile, samsung and mvebu, all of which already
  contain a lot of platform specific code in arch/arm"

* tag 'soc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (187 commits)
  ARM: mvebu: use the cpufreq-dt platform_data for independent clocks
  soc: integrator: Add terminating entry for integrator_cm_match
  ARM: mvebu: add SDRAM controller description for Armada XP
  ARM: mvebu: adjust mbus controller description on Armada 370/XP
  ARM: mvebu: add suspend/resume DT information for Armada XP GP
  ARM: mvebu: synchronize secondary CPU clocks on resume
  ARM: mvebu: make sure MMU is disabled in armada_370_xp_cpu_resume
  ARM: mvebu: Armada XP GP specific suspend/resume code
  ARM: mvebu: reserve the first 10 KB of each memory bank for suspend/resume
  ARM: mvebu: implement suspend/resume support for Armada XP
  clk: mvebu: add suspend/resume for gatable clocks
  bus: mvebu-mbus: provide a mechanism to save SDRAM window configuration
  bus: mvebu-mbus: suspend/resume support
  clocksource: time-armada-370-xp: add suspend/resume support
  irqchip: armada-370-xp: Add suspend/resume support
  ARM: add lolevel debug support for asm9260
  ARM: add mach-asm9260
  ARM: EXYNOS: use u8 for val[] in struct exynos_pmu_conf
  power: reset: imx-snvs-poweroff: add power off driver for i.mx6
  ARM: imx: temporarily remove CONFIG_SOC_FSL from LS1021A
  ...
</content>
</entry>
<entry>
<title>arm: pxa: move init functions into generic.h</title>
<updated>2014-11-19T22:53:14+00:00</updated>
<author>
<name>Robert Jarzmik</name>
<email>robert.jarzmik@free.fr</email>
</author>
<published>2014-09-28T11:59:41+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=4508f7751728980873c0368dedb298fc6f550b50'/>
<id>urn:sha1:4508f7751728980873c0368dedb298fc6f550b50</id>
<content type='text'>
In order to have a unique .c file for all pxa variants device-tree
definitions, all the initialization functions for MACHINE_START and
DT_MACHINE_START have been put together into generic.h.

The alternative would have been one pxaXXX-dt.c file per variant.

The move is necessary because each include/mach/pxaXXX.h includes the
variant register descriptions which intersects and conflicts one with
each other.

The change is a preparation for pxa-dt.c to support multiple pxa,
ie. pxa3xx and pxa27x.

The machine files including mach/pxaXXX.h all include generic.h, which
guarantees no regression should be introduced.

Signed-off-by: Robert Jarzmik &lt;robert.jarzmik@free.fr&gt;
Acked-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
</entry>
<entry>
<title>ARM: pxa: fix hang on startup with DEBUG_LL</title>
<updated>2014-10-20T19:11:40+00:00</updated>
<author>
<name>Robert Jarzmik</name>
<email>robert.jarzmik@free.fr</email>
</author>
<published>2014-10-07T19:18:14+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=cde7fc879969f933614b1256df2625d6ff637bab'/>
<id>urn:sha1:cde7fc879969f933614b1256df2625d6ff637bab</id>
<content type='text'>
The commit 2111667b4677 ("ARM: pxa: call debug_ll_io_init for
earlyprintk") triggers in the current kernel the attached backtrace on
PXA/tosa early in the boot time when DEBUG_LL is enabled.

It is due to overlap between uart virtual memory defined in
DEBUG_UART_VIRT and mapped by debug_ll_io_init() and peripheral bus
mapped by pxa_map_io at the same address, 0xf2100000.

As hinted by Arnd, map early virtual memory for low level debug on
address 0xf6200000, even if that means 2 virtual mappings will give
access to the pxa internal UARTs (FFUART, BTUART, STUART, ...).

------------[ cut here ]------------
kernel BUG at /home/lumag/linux/mm/vmalloc.c:1143!
Internal error: Oops - BUG: 0 [#1] PREEMPT ARM
Modules linked in:
CPU: 0 PID: 0 Comm: swapper Not tainted 3.17.0-00032-g8e0d202-dirty #23
task: c062a5a8 ti: c0620000 task.ti: c0620000
PC is at vm_area_add_early+0x54/0x84
LR is at add_static_vm_early+0xc/0x60
pc : [&lt;c03e1100&gt;]    lr : [&lt;c03d9ef4&gt;]    psr: 800001d3
sp : c0621f04  ip : c03efa74  fp : c03edf84
r10: c0637e98  r9 : 40000001  r8 : c03da57c
r7 : c3ffcfb0  r6 : 00000000  r5 : c3ffcfb0  r4 : 02000000
r3 : c3ffcfd8  r2 : f2100000  r1 : f4000000  r0 : c3ffcfb0
Flags: Nzcv  IRQs off  FIQs off  Mode SVC_32  ISA ARM  Segment kernel
Control: 00007977  Table: a0004000  DAC: 00000017
Process swapper (pid: 0, stack limit = 0xc06201c8)
Stack: (0xc0621f04 to 0xc0622000)
1f00:          c3ffcfd8 40000001 c3ffcfd8 c03ee08c c03da570 c03db90c c0637d24
1f20: 00000000 c03ec7cc c066e654 a0700000 000a0700 c03db914 c03db90c c03daf84
1f40: 00000000 000a0000 c0000000 c03ec7cc 000a0700 c0700000 ffff1000 000a3fff
1f60: 00001000 00000007 00000000 c03ec7cc c0008000 c03ed748 c0621fd4 c03d5d18
1f80: 69052d00 a03ec48c 00000000 c03d8ad0 0000006c 00007977 c036c6e8 00000001
1fa0: c0621fd4 c03ed744 c0628000 a0004000 69052d00 a03ec48c 00000000 c03d68d4
1fc0: 00000000 00000000 00000000 00000000 00000000 c03ed748 c0649894 c062801c
1fe0: c03ed744 c062b2f0 a0004000 69052d00 a03ec48c a0008040 00000000 00000000
[&lt;c03e1100&gt;] (vm_area_add_early) from [&lt;c03d9ef4&gt;] (add_static_vm_early+0xc/0x60)
[&lt;c03d9ef4&gt;] (add_static_vm_early) from [&lt;c03da570&gt;] (iotable_init.part.6+0xa8/0xb4)
[&lt;c03da570&gt;] (iotable_init.part.6) from [&lt;c03db914&gt;] (pxa25x_map_io+0x8/0x24)
[&lt;c03db914&gt;] (pxa25x_map_io) from [&lt;c03daf84&gt;] (paging_init+0x744/0x8d8)
[&lt;c03daf84&gt;] (paging_init) from [&lt;c03d8ad0&gt;] (setup_arch+0x354/0x608)
[&lt;c03d8ad0&gt;] (setup_arch) from [&lt;c03d68d4&gt;] (start_kernel+0xa8/0x3dc)
[&lt;c03d68d4&gt;] (start_kernel) from [&lt;a0008040&gt;] (0xa0008040)
Code: e5904008 e0811004 e1520001 2a000005 (e7f001f2)
---[ end trace f24b6c88ae00fa9a ]---
Kernel panic - not syncing: Attempted to kill the idle task!
---[ end Kernel panic - not syncing: Attempted to kill the idle task!

Cc: &lt;stable@vger.kernel.org&gt;
Reported-by: Dmitry Eremin-Solenikov &lt;dbaryshkov@gmail.com&gt;
Signed-off-by: Robert Jarzmik &lt;robert.jarzmik@free.fr&gt;
Acked-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
</entry>
<entry>
<title>arm: pxa: add clock pll selection bits</title>
<updated>2014-09-30T19:31:31+00:00</updated>
<author>
<name>Robert Jarzmik</name>
<email>robert.jarzmik@free.fr</email>
</author>
<published>2014-07-30T20:51:01+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=108f303f0ed92549b061e08a18361ad4bd540b27'/>
<id>urn:sha1:108f303f0ed92549b061e08a18361ad4bd540b27</id>
<content type='text'>
Add missing bits for CCCR and CCSR :
 - CPLL and PPLL selection, either full speed or 13MHz
 - CPSR masks

Signed-off-by: Robert Jarzmik &lt;robert.jarzmik@free.fr&gt;
Signed-off-by: Mike Turquette &lt;mturquette@linaro.org&gt;
</content>
</entry>
<entry>
<title>ARM: pxa: Move iotable mapping inside vmalloc region</title>
<updated>2014-07-12T16:51:45+00:00</updated>
<author>
<name>Ezequiel Garcia</name>
<email>ezequiel.garcia@free-electrons.com</email>
</author>
<published>2014-07-11T11:00:39+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=c3df51333444b7404a5b62f3e96f7a5d5b4fd2db'/>
<id>urn:sha1:c3df51333444b7404a5b62f3e96f7a5d5b4fd2db</id>
<content type='text'>
In order to remove the following ugly message:

  BUG: mapping for 0x00000000 at 0xff000000 out of vmalloc space

the iotable mappings should be re-located inside the vmalloc
region. Such move was introduced at commit:

commit 0536bdf33faff4d940ac094c77998cfac368cfff
Author: Nicolas Pitre &lt;nicolas.pitre@linaro.org&gt;
Date:   Thu Aug 25 00:35:59 2011 -0400

    ARM: move iotable mappings within the vmalloc region

Signed-off-by: Ezequiel Garcia &lt;ezequiel.garcia@free-electrons.com&gt;
[laurent.pinchart@ideasonboard.com: Hardcode the virtual address]
Signed-off-by: Laurent Pinchart &lt;laurent.pinchart@ideasonboard.com&gt;
Acked-by: Nicolas Pitre &lt;nico@linaro.org&gt;
Signed-off-by: Olof Johansson &lt;olof@lixom.net&gt;
</content>
</entry>
<entry>
<title>ARM: pxa: Don't hardcode addresses and size in map_desc tables</title>
<updated>2014-07-12T16:51:36+00:00</updated>
<author>
<name>Laurent Pinchart</name>
<email>laurent.pinchart@ideasonboard.com</email>
</author>
<published>2014-07-11T11:00:36+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=0e32986c0f51d585b4980a0f01c269627f51b78b'/>
<id>urn:sha1:0e32986c0f51d585b4980a0f01c269627f51b78b</id>
<content type='text'>
The virtual address, physical address and size of all regions for which
we create static mappings are defined in PXA headers. Replaced the
hardcoded values with macros.

Signed-off-by: Laurent Pinchart &lt;laurent.pinchart@ideasonboard.com&gt;
Acked-by: Nicolas Pitre &lt;nico@linaro.org&gt;
Signed-off-by: Olof Johansson &lt;olof@lixom.net&gt;
</content>
</entry>
</feed>
