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<title>BMC/Intel-BMC/linux.git/arch/arm/mach-prima2, branch dev</title>
<subtitle>Intel OpenBMC Linux kernel source tree (mirror)</subtitle>
<id>https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev</id>
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<updated>2015-07-08T21:20:12+00:00</updated>
<entry>
<title>Merge tag 'sirf-iobrg2regmap-for-4.2' of git://git.kernel.org/pub/scm/linux/kernel/git/baohua/linux into fixes</title>
<updated>2015-07-08T21:20:12+00:00</updated>
<author>
<name>Kevin Hilman</name>
<email>khilman@linaro.org</email>
</author>
<published>2015-07-08T21:20:12+00:00</published>
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<id>urn:sha1:8dfaf05682ebb9be8aaf29538f1acf89d885ef44</id>
<content type='text'>
Merge "CSR SiRFSoC rtc iobrg move to regmap for 4.2" from Barry Song:

move CSR rtc iobrg read/write API to be regmap

this moves to general APIs, and all drivers will be changed based
on it.

* tag 'sirf-iobrg2regmap-for-4.2' of git://git.kernel.org/pub/scm/linux/kernel/git/baohua/linux:
  ARM: prima2: move to use REGMAP APIs for rtciobrg
</content>
</entry>
<entry>
<title>ARM: prima2: move to use REGMAP APIs for rtciobrg</title>
<updated>2015-06-10T07:10:26+00:00</updated>
<author>
<name>Guo Zeng</name>
<email>Guo.Zeng@csr.com</email>
</author>
<published>2015-04-14T11:55:55+00:00</published>
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<id>urn:sha1:b1999477ed91c3c33891acfe0e18a4457e5c4915</id>
<content type='text'>
all devices behind rtciobrg needs a special way to access. currently they
are using a platform-specific API.
this patch moves to REGMAP, then clients can use regmap APIs to read/write.
for the moment, old APIs are still kept, once all clients move to regmap,
old APIs will be dropped.

this patch also does minor clean for comments, authors statement.

Signed-off-by: Guo Zeng &lt;Guo.Zeng@csr.com&gt;
Signed-off-by: Barry Song &lt;Baohua.Song@csr.com&gt;
</content>
</entry>
<entry>
<title>ARM: v7 setup function should invalidate L1 cache</title>
<updated>2015-06-01T10:30:26+00:00</updated>
<author>
<name>Russell King</name>
<email>rmk+kernel@arm.linux.org.uk</email>
</author>
<published>2015-05-19T16:06:44+00:00</published>
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<id>urn:sha1:02b4e2756e01c623cc4dbceae4b07be75252db5b</id>
<content type='text'>
All ARMv5 and older CPUs invalidate their caches in the early assembly
setup function, prior to enabling the MMU.  This is because the L1
cache should not contain any data relevant to the execution of the
kernel at this point; all data should have been flushed out to memory.

This requirement should also be true for ARMv6 and ARMv7 CPUs - indeed,
these typically do not search their caches when caching is disabled (as
it needs to be when the MMU is disabled) so this change should be safe.

ARMv7 allows there to be CPUs which search their caches while caching is
disabled, and it's permitted that the cache is uninitialised at boot;
for these, the architecture reference manual requires that an
implementation specific code sequence is used immediately after reset
to ensure that the cache is placed into a sane state.  Such
functionality is definitely outside the remit of the Linux kernel, and
must be done by the SoC's firmware before _any_ CPU gets to the Linux
kernel.

Changing the data cache clean+invalidate to a mere invalidate allows us
to get rid of a lot of platform specific hacks around this issue for
their secondary CPU bringup paths - some of which were buggy.

Reviewed-by: Florian Fainelli &lt;f.fainelli@gmail.com&gt;
Tested-by: Florian Fainelli &lt;f.fainelli@gmail.com&gt;
Tested-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
Tested-by: Dinh Nguyen &lt;dinguyen@opensource.altera.com&gt;
Acked-by: Sebastian Hesselbarth &lt;sebastian.hesselbarth@gmail.com&gt;
Tested-by: Sebastian Hesselbarth &lt;sebastian.hesselbarth@gmail.com&gt;
Acked-by: Shawn Guo &lt;shawn.guo@linaro.org&gt;
Tested-by: Thierry Reding &lt;treding@nvidia.com&gt;
Acked-by: Thierry Reding &lt;treding@nvidia.com&gt;
Tested-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Tested-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
Tested-by: Wei Xu &lt;xuwei5@hisilicon.com&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
</entry>
<entry>
<title>ARM: make of_device_ids const</title>
<updated>2015-02-19T08:44:25+00:00</updated>
<author>
<name>Uwe Kleine-König</name>
<email>u.kleine-koenig@pengutronix.de</email>
</author>
<published>2015-02-18T20:19:56+00:00</published>
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<id>urn:sha1:444d2d33d8564f95df851ddaca80f640ca36934d</id>
<content type='text'>
of_device_ids (i.e. compatible strings and the respective data) are not
supposed to change at runtime. All functions working with of_device_ids
provided by &lt;linux/of.h&gt; work with const of_device_ids. So mark the
non-const structs in arch/arm as const, too.

While at it also add some __initconst annotations.

Acked-by: Jason Cooper &lt;jason@lakedameon.net&gt;
Signed-off-by: Uwe Kleine-König &lt;u.kleine-koenig@pengutronix.de&gt;
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
</entry>
<entry>
<title>ARM: make arrays containing machine compatible strings const</title>
<updated>2015-02-19T08:44:17+00:00</updated>
<author>
<name>Uwe Kleine-König</name>
<email>u.kleine-koenig@pengutronix.de</email>
</author>
<published>2015-02-18T20:01:45+00:00</published>
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<id>urn:sha1:543c5040f564c80fe59ae82a60fc061055d04a41</id>
<content type='text'>
The definition

	static const char *axxia_dt_match[] __initconst = {
		...

defines a changable array of constant strings. That is you must not do:

	*axxia_dt_match[0] = 'k';

but

	axxia_dt_match[0] = "different string";

is fine. So the annotation __initconst is wrong and yields a compiler
error when other really const variables are added with __initconst.

As the struct machine_desc member dt_compat is declared as

	const char *const *dt_compat;

making the arrays const is the better alternative over changing all
annotations to __initdata.

Signed-off-by: Uwe Kleine-König &lt;u.kleine-koenig@pengutronix.de&gt;
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
</entry>
<entry>
<title>ARM: prima2: do not select SMP_ON_UP</title>
<updated>2015-02-18T11:20:27+00:00</updated>
<author>
<name>Arnd Bergmann</name>
<email>arnd@arndb.de</email>
</author>
<published>2015-01-25T14:01:34+00:00</published>
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<id>urn:sha1:d76f733ddad6ebc5166675a77824673588797202</id>
<content type='text'>
The new Atlas7 platform implicitly selects 'CONFIG_SMP_ON_UP',
which leads to problems if we enable building the platform without
MMU, as that combination is not allowed and causes a link error:

arch/arm/kernel/built-in.o: In function `c_show':
:(.text+0x1872): undefined reference to `smp_on_up'
:(.text+0x1876): undefined reference to `smp_on_up'
arch/arm/kernel/built-in.o: In function `arch_irq_work_raise':
:(.text+0x3d48): undefined reference to `smp_on_up'
:(.text+0x3d4c): undefined reference to `smp_on_up'
arch/arm/kernel/built-in.o: In function `smp_setup_processor_id':
:(.init.text+0x180): undefined reference to `smp_on_up'

This removes the 'select' statement.

Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Fixes: 4cba058526a7 ("ARM: sirf: add Atlas7 machine support")
Acked-by: Barry Song &lt;Baohua.Song@csr.com&gt;
Cc: Zhiwu Song &lt;Zhiwu.Song@csr.com&gt;
</content>
</entry>
<entry>
<title>Merge tag 'soc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc</title>
<updated>2015-02-17T17:27:54+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2015-02-17T17:27:54+00:00</published>
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<id>urn:sha1:878ba61aa98cbb97a513757800e77613f856a029</id>
<content type='text'>
Pull ARM SoC platform changes from Olof Johansson:
 "New and updated SoC support.  Also included are some cleanups where
  the platform maintainers hadn't separated cleanups from new developent
  in separate branches.

  Some of the larger things worth pointing out:

   - A large set of changes from Alexandre Belloni and Nicolas Ferre
     preparing at91 platforms for multiplatform and cleaning up quite a
     bit in the process.

   - Removal of CSR's "Marco" SoC platform that never made it out to the
     market.  We love seeing these since it means the vendor published
     support before product was out, which is exactly what we want!

  New platforms this release are:

   - Conexant Digicolor (CX92755 SoC)
   - Hisilicon HiP01 SoC
   - CSR/sirf Atlas7 SoC
   - ST STiH418 SoC
   - Common code changes for Nvidia Tegra132 (64-bit SoC)

  We're seeing more and more platforms having a harder time labelling
  changes as cleanups vs new development -- which is a good sign that
  we've come quite far on the cleanup effort.  So over time we might
  start combining the cleanup and new-development branches more"

* tag 'soc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (124 commits)
  ARM: at91/trivial: unify functions and machine names
  ARM: at91: remove at91_dt_initialize and machine init_early()
  ARM: at91: change board files into SoC files
  ARM: at91: remove at91_boot_soc
  ARM: at91: move alternative initial mapping to board-dt-sama5.c
  ARM: at91: merge all SOC_AT91SAM9xxx
  ARM: at91: at91rm9200: set idle and restart from rm9200_dt_device_init()
  ARM: digicolor: select syscon and timer
  ARM: zynq: Simplify SLCR initialization
  ARM: zynq: PM: Fixed simple typo.
  ARM: zynq: Setup default gpio number for Xilinx Zynq
  ARM: digicolor: add low level debug support
  ARM: initial support for Conexant Digicolor CX92755 SoC
  ARM: OMAP2+: Add dm816x hwmod support
  ARM: OMAP2+: Add clock domain support for dm816x
  ARM: OMAP2+: Add board-generic.c entry for ti81xx
  ARM: at91: pm: remove warning to remove SOC_AT91SAM9263 usage
  ARM: at91: remove unused mach/system_rev.h
  ARM: at91: stop using HAVE_AT91_DBGUx
  ARM: at91: fix ordering of SRAM and PM initialization
  ...
</content>
</entry>
<entry>
<title>ARM: sirf: drop redundant function and marco declaration</title>
<updated>2015-02-06T08:31:58+00:00</updated>
<author>
<name>Barry Song</name>
<email>Baohua.Song@csr.com</email>
</author>
<published>2015-02-03T15:38:09+00:00</published>
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<id>urn:sha1:41e229a91207afc326f9a83ba33c098c8362d303</id>
<content type='text'>
with the patchset to add CSR atlas7 support, the below stuff
has no user now:
SIRFSOC_VA
sirfsoc_map_lluart
sirfsoc_map_scu

the related patches missed to drop them.

Signed-off-by: Barry Song &lt;Baohua.Song@csr.com&gt;
Signed-off-by: Olof Johansson &lt;olof@lixom.net&gt;
</content>
</entry>
<entry>
<title>ARM: sirf: add Atlas7 machine support</title>
<updated>2015-01-20T11:56:58+00:00</updated>
<author>
<name>Zhiwu Song</name>
<email>Zhiwu.Song@csr.com</email>
</author>
<published>2015-01-04T09:53:37+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=4cba058526a7563603ab18f06e298633dd69fc77'/>
<id>urn:sha1:4cba058526a7563603ab18f06e298633dd69fc77</id>
<content type='text'>
CSRatlas7 is next-gen auto SoC from CSR.
It could bring to customers most integrated SoC solution:
- World leading Bluetooth 4.0 and GNSS baseband
- Audio processing, analog CODEC and ADC by DSP
- Analog video input
- SDR accelerators
- CAN bus support by Cortex-M3

Signed-off-by: Zhiwu Song &lt;Zhiwu.Song@csr.com&gt;
Signed-off-by: Barry Song &lt;Baohua.Song@csr.com&gt;
Acked-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
</entry>
<entry>
<title>ARM: sirf: move to debug_ll_io_init and drop map_io</title>
<updated>2015-01-20T11:56:53+00:00</updated>
<author>
<name>Barry Song</name>
<email>Baohua.Song@csr.com</email>
</author>
<published>2015-01-04T09:40:54+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=1805f4d6514b70d40bf9468308fa8bdfbfcd3905'/>
<id>urn:sha1:1805f4d6514b70d40bf9468308fa8bdfbfcd3905</id>
<content type='text'>
This patch moves to debug_ll_io_init(), then finally drops CSR map_io()
machine callbacks.

Signed-off-by: Barry Song &lt;Baohua.Song@csr.com&gt;
Acked-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
</entry>
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