<feed xmlns='http://www.w3.org/2005/Atom'>
<title>BMC/Intel-BMC/linux.git/arch/arm/mach-omap2, branch dev</title>
<subtitle>Intel OpenBMC Linux kernel source tree (mirror)</subtitle>
<id>https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev</id>
<link rel='self' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/'/>
<updated>2015-08-19T22:25:25+00:00</updated>
<entry>
<title>ARM: OMAP: wakeupgen: Restore the irq_set_type() mechanism</title>
<updated>2015-08-19T22:25:25+00:00</updated>
<author>
<name>Grygorii Strashko</name>
<email>grygorii.strashko@ti.com</email>
</author>
<published>2015-08-14T12:20:28+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=63059a272398ef5dc1bd7065a036e8b6e82d1af7'/>
<id>urn:sha1:63059a272398ef5dc1bd7065a036e8b6e82d1af7</id>
<content type='text'>
The conversion of the wakeupgen irqchip to hierarchical irq domains
failed to provide a mechanism to properly set the trigger type of an
interrupt.

The wakeupgen irq chip itself has no mechanism and therefor no
irq_set_type() callback. The code before the conversion relayed the
trigger configuration directly to the underlying GIC.

Restore the correct behaviour by setting the wakeupgen irq_set_type
callback to irq_chip_set_type_parent(). This propagates the
set_trigger() call to the underlying GIC irqchip.

[ tglx: Massaged changelog ]

Fixes: 7136d457f365 ('ARM: omap: convert wakeupgen to stacked domains')
Signed-off-by: Grygorii Strashko &lt;grygorii.strashko@ti.com&gt;
Acked-by: Tony Lindgren &lt;tony@atomide.com&gt;
Cc: Sudeep Holla &lt;sudeep.holla@arm.com&gt;
Cc: &lt;linux@arm.linux.org.uk&gt;
Cc: &lt;nsekhar@ti.com&gt;
Cc: &lt;jason@lakedaemon.net&gt;
Cc: &lt;balbi@ti.com&gt;
Cc: &lt;linux-arm-kernel@lists.infradead.org&gt;
Cc: &lt;marc.zyngier@arm.com&gt;
Cc: stable@vger.kernel.org # 4.1
Link: http://lkml.kernel.org/r/1439554830-19502-5-git-send-email-grygorii.strashko@ti.com
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
</content>
</entry>
<entry>
<title>Merge tag 'for-v4.2-rc/omap-fixes-a' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into fixes</title>
<updated>2015-07-26T18:52:03+00:00</updated>
<author>
<name>Olof Johansson</name>
<email>olof@lixom.net</email>
</author>
<published>2015-07-26T18:52:03+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=ee5d35e7816ac53efbaebbfa6e8d5938f1c99691'/>
<id>urn:sha1:ee5d35e7816ac53efbaebbfa6e8d5938f1c99691</id>
<content type='text'>
Merge "ARM: OMAP2+: hwmod fixes for v4.2-rc" from Paul Walmsley:

ARM: OMAP2+: hwmod fixes for v4.2-rc

Two fixes against v4.2-rc1.  The first, for DRA7xx platforms,
corrects some incorrect GPMC hardware description data.  The
second one will ensure that the hwmod code will wait for any
module with CPU-accessible registers to become ready before
attempting to access it.

Basic build, boot, and PM test logs are available here:

http://www.pwsan.com/omap/testlogs/omap-hwmod-a-for-v4.2-rc/20150723065408/

Note that I do not have a DRA7xx or AM43xx board, and therefore
cannot test on those platforms.

* tag 'for-v4.2-rc/omap-fixes-a' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending:
  ARM: OMAP2+: hwmod: Fix _wait_target_ready() for hwmods without sysc
  ARM: DRA7: hwmod: fix gpmc hwmod

Signed-off-by: Olof Johansson &lt;olof@lixom.net&gt;
</content>
</entry>
<entry>
<title>ARM: OMAP2+: hwmod: Fix _wait_target_ready() for hwmods without sysc</title>
<updated>2015-07-23T12:35:25+00:00</updated>
<author>
<name>Roger Quadros</name>
<email>rogerq@ti.com</email>
</author>
<published>2015-07-16T13:16:44+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=9a258afa928b45e6dd2efcac46ccf7eea705d35a'/>
<id>urn:sha1:9a258afa928b45e6dd2efcac46ccf7eea705d35a</id>
<content type='text'>
For hwmods without sysc, _init_mpu_rt_base(oh) won't be called and so
_find_mpu_rt_port(oh) will return NULL thus preventing ready state check
on those modules after the module is enabled.

This can potentially cause a bus access error if the module is accessed
before the module is ready.

Fix this by unconditionally calling _init_mpu_rt_base() during hwmod
_init(). Do ioremap only if we need SYSC access.

Eventhough _wait_target_ready() check doesn't really need MPU RT port but
just the PRCM registers, we still mandate that the hwmod must have an
MPU RT port if ready state check needs to be done. Else it would mean that
the module is not accessible by MPU so there is no point in waiting
for target to be ready.

e.g. this fixes the below DCAN bus access error on AM437x-gp-evm.

[   16.672978] ------------[ cut here ]------------
[   16.677885] WARNING: CPU: 0 PID: 1580 at drivers/bus/omap_l3_noc.c:147 l3_interrupt_handler+0x234/0x35c()
[   16.687946] 44000000.ocp:L3 Custom Error: MASTER M2 (64-bit) TARGET L4_PER_0 (Read): Data Access in User mode during Functional access
[   16.700654] Modules linked in: xhci_hcd btwilink ti_vpfe dwc3 videobuf2_core ov2659 bluetooth v4l2_common videodev ti_am335x_adc kfifo_buf industrialio c_can_platform videobuf2_dma_contig media snd_soc_tlv320aic3x pixcir_i2c_ts c_can dc
[   16.731144] CPU: 0 PID: 1580 Comm: rpc.statd Not tainted 3.14.26-02561-gf733aa036398 #180
[   16.739747] Backtrace:
[   16.742336] [&lt;c0011108&gt;] (dump_backtrace) from [&lt;c00112a4&gt;] (show_stack+0x18/0x1c)
[   16.750285]  r6:00000093 r5:00000009 r4:eab5b8a8 r3:00000000
[   16.756252] [&lt;c001128c&gt;] (show_stack) from [&lt;c05a4418&gt;] (dump_stack+0x20/0x28)
[   16.763870] [&lt;c05a43f8&gt;] (dump_stack) from [&lt;c0037120&gt;] (warn_slowpath_common+0x6c/0x8c)
[   16.772408] [&lt;c00370b4&gt;] (warn_slowpath_common) from [&lt;c00371e4&gt;] (warn_slowpath_fmt+0x38/0x40)
[   16.781550]  r8:c05d1f90 r7:c0730844 r6:c0730448 r5:80080003 r4:ed0cd210
[   16.788626] [&lt;c00371b0&gt;] (warn_slowpath_fmt) from [&lt;c027fa94&gt;] (l3_interrupt_handler+0x234/0x35c)
[   16.797968]  r3:ed0cd480 r2:c0730508
[   16.801747] [&lt;c027f860&gt;] (l3_interrupt_handler) from [&lt;c0063758&gt;] (handle_irq_event_percpu+0x54/0x1bc)
[   16.811533]  r10:ed005600 r9:c084855b r8:0000002a r7:00000000 r6:00000000 r5:0000002a
[   16.819780]  r4:ed0e6d80
[   16.822453] [&lt;c0063704&gt;] (handle_irq_event_percpu) from [&lt;c00638f0&gt;] (handle_irq_event+0x30/0x40)
[   16.831789]  r10:eb2b6938 r9:eb2b6960 r8:bf011420 r7:fa240100 r6:00000000 r5:0000002a
[   16.840052]  r4:ed005600
[   16.842744] [&lt;c00638c0&gt;] (handle_irq_event) from [&lt;c00661d8&gt;] (handle_fasteoi_irq+0x74/0x128)
[   16.851702]  r4:ed005600 r3:00000000
[   16.855479] [&lt;c0066164&gt;] (handle_fasteoi_irq) from [&lt;c0063068&gt;] (generic_handle_irq+0x28/0x38)
[   16.864523]  r4:0000002a r3:c0066164
[   16.868294] [&lt;c0063040&gt;] (generic_handle_irq) from [&lt;c000ef60&gt;] (handle_IRQ+0x38/0x8c)
[   16.876612]  r4:c081c640 r3:00000202
[   16.880380] [&lt;c000ef28&gt;] (handle_IRQ) from [&lt;c00084f0&gt;] (gic_handle_irq+0x30/0x5c)
[   16.888328]  r6:eab5ba38 r5:c0804460 r4:fa24010c r3:00000100
[   16.894303] [&lt;c00084c0&gt;] (gic_handle_irq) from [&lt;c05a8d80&gt;] (__irq_svc+0x40/0x50)
[   16.902193] Exception stack(0xeab5ba38 to 0xeab5ba80)
[   16.907499] ba20:                                                       00000000 00000006
[   16.916108] ba40: fa1d0000 fa1d0008 ed3d3000 eab5bab4 ed3d3460 c0842af4 bf011420 eb2b6960
[   16.924716] ba60: eb2b6938 eab5ba8c eab5ba90 eab5ba80 bf035220 bf07702c 600f0013 ffffffff
[   16.933317]  r7:eab5ba6c r6:ffffffff r5:600f0013 r4:bf07702c
[   16.939317] [&lt;bf077000&gt;] (c_can_plat_read_reg_aligned_to_16bit [c_can_platform]) from [&lt;bf035220&gt;] (c_can_get_berr_counter+0x38/0x64 [c_can])
[   16.952696] [&lt;bf0351e8&gt;] (c_can_get_berr_counter [c_can]) from [&lt;bf010294&gt;] (can_fill_info+0x124/0x15c [can_dev])
[   16.963480]  r5:ec8c9740 r4:ed3d3000
[   16.967253] [&lt;bf010170&gt;] (can_fill_info [can_dev]) from [&lt;c0502fa8&gt;] (rtnl_fill_ifinfo+0x58c/0x8fc)
[   16.976749]  r6:ec8c9740 r5:ed3d3000 r4:eb2b6780
[   16.981613] [&lt;c0502a1c&gt;] (rtnl_fill_ifinfo) from [&lt;c0503408&gt;] (rtnl_dump_ifinfo+0xf0/0x1dc)
[   16.990401]  r10:ec8c9740 r9:00000000 r8:00000000 r7:00000000 r6:ebd4d1b4 r5:ed3d3000
[   16.998671]  r4:00000000
[   17.001342] [&lt;c0503318&gt;] (rtnl_dump_ifinfo) from [&lt;c050e6e4&gt;] (netlink_dump+0xa8/0x1e0)
[   17.009772]  r10:00000000 r9:00000000 r8:c0503318 r7:ebf3e6c0 r6:ebd4d1b4 r5:ec8c9740
[   17.018050]  r4:ebd4d000
[   17.020714] [&lt;c050e63c&gt;] (netlink_dump) from [&lt;c050ec10&gt;] (__netlink_dump_start+0x104/0x154)
[   17.029591]  r6:eab5bd34 r5:ec8c9980 r4:ebd4d000
[   17.034454] [&lt;c050eb0c&gt;] (__netlink_dump_start) from [&lt;c0505604&gt;] (rtnetlink_rcv_msg+0x110/0x1f4)
[   17.043778]  r7:00000000 r6:ec8c9980 r5:00000f40 r4:ebf3e6c0
[   17.049743] [&lt;c05054f4&gt;] (rtnetlink_rcv_msg) from [&lt;c05108e8&gt;] (netlink_rcv_skb+0xb4/0xc8)
[   17.058449]  r8:eab5bdac r7:ec8c9980 r6:c05054f4 r5:ec8c9980 r4:ebf3e6c0
[   17.065534] [&lt;c0510834&gt;] (netlink_rcv_skb) from [&lt;c0504134&gt;] (rtnetlink_rcv+0x24/0x2c)
[   17.073854]  r6:ebd4d000 r5:00000014 r4:ec8c9980 r3:c0504110
[   17.079846] [&lt;c0504110&gt;] (rtnetlink_rcv) from [&lt;c05102ac&gt;] (netlink_unicast+0x180/0x1ec)
[   17.088363]  r4:ed0c6800 r3:c0504110
[   17.092113] [&lt;c051012c&gt;] (netlink_unicast) from [&lt;c0510670&gt;] (netlink_sendmsg+0x2ac/0x380)
[   17.100813]  r10:00000000 r8:00000008 r7:ec8c9980 r6:ebd4d000 r5:eab5be70 r4:eab5bee4
[   17.109083] [&lt;c05103c4&gt;] (netlink_sendmsg) from [&lt;c04dfdb4&gt;] (sock_sendmsg+0x90/0xb0)
[   17.117305]  r10:00000000 r9:eab5a000 r8:becdda3c r7:0000000c r6:ea978400 r5:eab5be70
[   17.125563]  r4:c05103c4
[   17.128225] [&lt;c04dfd24&gt;] (sock_sendmsg) from [&lt;c04e1c28&gt;] (SyS_sendto+0xb8/0xdc)
[   17.136001]  r6:becdda5c r5:00000014 r4:ecd37040
[   17.140876] [&lt;c04e1b70&gt;] (SyS_sendto) from [&lt;c000e680&gt;] (ret_fast_syscall+0x0/0x30)
[   17.148923]  r10:00000000 r8:c000e804 r7:00000122 r6:becdda5c r5:0000000c r4:becdda5c
[   17.157169] ---[ end trace 2b71e15b38f58bad ]---

Fixes: 6423d6df1440 ("ARM: OMAP2+: hwmod: check for module address space during init")
Signed-off-by: Roger Quadros &lt;rogerq@ti.com&gt;
Signed-off-by: Paul Walmsley &lt;paul@pwsan.com&gt;
Cc: &lt;stable@vger.kernel.org&gt;
</content>
</entry>
<entry>
<title>ARM: DRA7: hwmod: fix gpmc hwmod</title>
<updated>2015-07-15T22:21:06+00:00</updated>
<author>
<name>Roger Quadros</name>
<email>rogerq@ti.com</email>
</author>
<published>2015-07-08T14:34:43+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=91a57731eed05714609855b1d72e6118b6b3ec6f'/>
<id>urn:sha1:91a57731eed05714609855b1d72e6118b6b3ec6f</id>
<content type='text'>
GPMC smart idle is not really broken but it does not support
smart idle with wakeup.

Fixes: 556708fe8718 ("ARM: OMAP: DRA7: hwmod: Make gpmc software supervised as the smart idle is broken")

Signed-off-by: Roger Quadros &lt;rogerq@ti.com&gt;
Reviewed-by: Paul Walmsley &lt;paul@pwsan.com&gt;
Signed-off-by: Paul Walmsley &lt;paul@pwsan.com&gt;
</content>
</entry>
<entry>
<title>ARM: OMAP2+: Add HAVE_ARM_SCU for AM43XX</title>
<updated>2015-07-15T10:03:01+00:00</updated>
<author>
<name>Dave Gerlach</name>
<email>d-gerlach@ti.com</email>
</author>
<published>2015-07-10T21:05:48+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=f87d089d4469d05f565c8ce350b6631b14c4fff8'/>
<id>urn:sha1:f87d089d4469d05f565c8ce350b6631b14c4fff8</id>
<content type='text'>
CONFIG_HAVE_ARM_SCU only gets selected if CONFIG_SMP is selected in an OMAP
system, however AM43XX needs this option regardless of CONFIG_SMP and also
for an AM43XX only build as it is important for controlling power in the SoC.
Without this we cannot suspend the CPU for SoC suspend or cpuidle. The
ARM Cortex A9 needs SCU CPU Power Status bits to be set to off mode in order
for the PRCM to transition the MPU to low power modes.

Signed-off-by: Dave Gerlach &lt;d-gerlach@ti.com&gt;
Signed-off-by: Tony Lindgren &lt;tony@atomide.com&gt;
</content>
</entry>
<entry>
<title>Merge branch 'fixes-rc1' into omap-for-v4.2/fixes</title>
<updated>2015-07-06T12:33:17+00:00</updated>
<author>
<name>Tony Lindgren</name>
<email>tony@atomide.com</email>
</author>
<published>2015-07-06T12:33:17+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=ae745302c0a3e2b5b768690f631fc14db44467e7'/>
<id>urn:sha1:ae745302c0a3e2b5b768690f631fc14db44467e7</id>
<content type='text'>
</content>
</entry>
<entry>
<title>Merge tag 'hwspinlock-4.2' of git://git.kernel.org/pub/scm/linux/kernel/git/ohad/hwspinlock</title>
<updated>2015-07-03T21:52:25+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2015-07-03T21:52:25+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=d033ed9eeafc3bf33ce2de286ea2fb2c63e1c183'/>
<id>urn:sha1:d033ed9eeafc3bf33ce2de286ea2fb2c63e1c183</id>
<content type='text'>
Pull hwspinlock updates from Ohad Ben-Cohen:

 - hwspinlock core DT support from Suman Anna

 - OMAP hwspinlock DT support from Suman Anna

 - QCOM hwspinlock DT support from Bjorn Andersson

 - a new CSR atlas7 hwspinlock driver from Wei Chen

 - CSR atlas7 hwspinlock DT binding document from Wei Chen

 - a tiny QCOM hwspinlock driver fix from Bjorn Andersson

* tag 'hwspinlock-4.2' of git://git.kernel.org/pub/scm/linux/kernel/git/ohad/hwspinlock:
  hwspinlock: qcom: Correct msb in regmap_field
  DT: hwspinlock: add the CSR atlas7 hwspinlock bindings document
  hwspinlock: add a CSR atlas7 driver
  hwspinlock: qcom: Add support for Qualcomm HW Mutex block
  DT: hwspinlock: Add binding documentation for Qualcomm hwmutex
  hwspinlock/omap: add support for dt nodes
  Documentation: dt: add the omap hwspinlock bindings document
  hwspinlock/core: add device tree support
  Documentation: dt: add common bindings for hwspinlock
</content>
</entry>
<entry>
<title>Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc</title>
<updated>2015-06-26T18:43:59+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2015-06-26T18:43:59+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=3d9f96d850e4bbfae24dc9aee03033dd77c81596'/>
<id>urn:sha1:3d9f96d850e4bbfae24dc9aee03033dd77c81596</id>
<content type='text'>
Pull ARM SoC DT updates from Kevin Hilman:
 "As usual, quite a few device-tree updates in ARM land.  There was one
  minor churn in DTs due to relicensing under a dual-license, and lots
  of little additions of new peripherals, features etc, but nothing
  really exciting to call to your attention.  Some higlights, focsuing
  on support for new SoCs and boards:

   - AT91: new boards: Overkiz,  Acme Systems' Arietta G25
   - tegra: HDA support
   - bcm: new platforms: Buffalo WXR-1900DHP, SmartRG SR400ac, ASUS
     RT-AC87U
   - mvebu: new platforms: Compulab CM-A510, Armada 385-based Linksys
     boards, DLink DNS-327L
   - OMAP: new platforms: Baltos IR5221, LogicPD Torpedo, Toby-Churchill
     SL50
   - ARM: added support for Juno r1 board
   - sunxi: A33 SoC support; new boards: A23 EVB, SinA33, GA10H-A33,
     Mele A1000G
   - imx: i.MX7D SoC support; new boards: Armadeus Systems APF6,
     Gateworks GW5510, and aristainetos2 boards
   - hisilicon: hi6220 SoC support; new boards: 96boards hikey"

* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (462 commits)
  ARM: hisi: revert changes from hisi/hip04-dt branch
  ARM: nomadik: set proper compatible for accelerometer
  ARM64: juno: add GPIO keys
  ARM: at91/dt: sama5d4: fix dma conf for aes, sha and tdes nodes
  ARM: dts: Introduce STM32F429 MCU
  ARM: socfpga: dts: enable ethernet for Arria10 devkit
  ARM: dts: k2l: fix the netcp range size
  ARM: dts: k2e: fix the netcp range size
  ARM: dts: k2hk: fix the netcp range size
  ARM: dts: k2l-evm: Add device bindings for netcp driver
  ARM: dts: k2e-evm: Add device bindings for netcp driver
  ARM: dts: k2hk-evm: Add device bindings for netcp driver
  ARM: BCM5301X: Add DT for Asus RT-AC87U
  ARM: BCM5301X: add IRQ numbers for PCIe controller
  ARM: BCM5301X: add NAND flash chip description
  arm64: dts: Add dts files for Hisilicon Hi6220 SoC
  clk: hi6220: Document devicetree bindings for hi6220 clock
  arm64: hi6220: Document devicetree bindings for Hisilicon hi6220 SoC
  ARM: at91/dt: sama5d4ek: mci0 uses slot 0
  ARM: at91/dt: kizbox: fix mismatch LED PWM device
  ...
</content>
</entry>
<entry>
<title>Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc</title>
<updated>2015-06-26T18:34:35+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2015-06-26T18:34:35+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=4aa705b18bf17c4ff33ff7bbcd3f0c596443fa81'/>
<id>urn:sha1:4aa705b18bf17c4ff33ff7bbcd3f0c596443fa81</id>
<content type='text'>
Pull ARM SoC platform support updates from Kevin Hilman:
 "Our SoC branch usually contains expanded support for new SoCs and
  other core platform code.  Some highlights from this round:

   - sunxi: SMP support for A23 SoC
   - socpga: big-endian support
   - pxa: conversion to common clock framework
   - bcm: SMP support for BCM63138
   - imx: support new I.MX7D SoC
   - zte: basic support for ZX296702 SoC"

* tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (134 commits)
  ARM: zx: Add basic defconfig support for ZX296702
  ARM: dts: zx: add an initial zx296702 dts and doc
  clk: zx: add clock support to zx296702
  dt-bindings: Add #defines for ZTE ZX296702 clocks
  ARM: socfpga: fix build error due to secondary_startup
  MAINTAINERS: ARM64: EXYNOS: Extend entry for ARM64 DTS
  ARM: ep93xx: simone: support for SPI-based MMC/SD cards
  MAINTAINERS: update Shawn's email to use kernel.org one
  ARM: socfpga: support suspend to ram
  ARM: socfpga: add CPU_METHOD_OF_DECLARE for Arria 10
  ARM: socfpga: use CPU_METHOD_OF_DECLARE for socfpga_cyclone5
  ARM: EXYNOS: register power domain driver from core_initcall
  ARM: EXYNOS: use PS_HOLD based poweroff for all supported SoCs
  ARM: SAMSUNG: Constify platform_device_id
  ARM: EXYNOS: Constify irq_domain_ops
  ARM: EXYNOS: add coupled cpuidle support for Exynos3250
  ARM: EXYNOS: add exynos_get_boot_addr() helper
  ARM: EXYNOS: add exynos_set_boot_addr() helper
  ARM: EXYNOS: make exynos_core_restart() less verbose
  ARM: EXYNOS: fix exynos_boot_secondary() return value on timeout
  ...
</content>
</entry>
<entry>
<title>Merge tag 'armsoc-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc</title>
<updated>2015-06-26T18:08:27+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2015-06-26T18:08:27+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=c11d716218910c3aa2bac1bb641e6086ad649555'/>
<id>urn:sha1:c11d716218910c3aa2bac1bb641e6086ad649555</id>
<content type='text'>
Pull ARM SoC cleanups from Kevin Hilman:
 "A relatively small setup of cleanups this time around, and similar to
  last time the bulk of it is removal of legacy board support:

   - OMAP: removal of legacy (non-DT) booting for several platforms

   - i.MX: remove some legacy board files"

* tag 'armsoc-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (36 commits)
  ARM: fix EFM32 build breakage caused by cpu_resume_arm
  ARM: 8389/1: Add cpu_resume_arm() for firmwares that resume in ARM state
  ARM: v7 setup function should invalidate L1 cache
  mach-omap2: Remove use of deprecated marco, PTR_RET in devices.c
  ARM: OMAP2+: Remove calls to deprecacted marco,PTR_RET in the files,fb.c and pmu.c
  ARM: OMAP2+: Constify irq_domain_ops
  ARM: OMAP2+: use symbolic defines for console loglevels instead of numbers
  ARM: at91: remove useless Makefile.boot
  ARM: at91: remove at91rm9200_sdramc.h
  ARM: at91: remove mach/at91_ramc.h and mach/at91rm9200_mc.h
  ARM: at91/pm: use the atmel-mc syscon defines
  pcmcia: at91_cf: Use syscon to configure the MC/smc
  ARM: at91: declare the at91rm9200 memory controller as a syscon
  mfd: syscon: Add Atmel MC (Memory Controller) registers definition
  ARM: at91: drop sam9_smc.c
  ata: at91: use syscon to configure the smc
  ARM: ux500: delete static resource defines
  ARM: ux500: rename ux500_map_io
  ARM: ux500: look up PRCMU resource from DT
  ARM: ux500: kill off L2CC static map
  ...
</content>
</entry>
</feed>
