<feed xmlns='http://www.w3.org/2005/Atom'>
<title>BMC/Intel-BMC/linux.git/arch/arm/mach-meson, branch dev</title>
<subtitle>Intel OpenBMC Linux kernel source tree (mirror)</subtitle>
<id>https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev</id>
<link rel='self' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/'/>
<updated>2015-03-02T09:59:50+00:00</updated>
<entry>
<title>ARM: meson: select PINCTRL_MESON and ARCH_REQUIRE_GPIOLIB</title>
<updated>2015-03-02T09:59:50+00:00</updated>
<author>
<name>Beniamino Galvani</name>
<email>b.galvani@gmail.com</email>
</author>
<published>2015-01-17T18:15:15+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=ec9c06831e7fcd01e0cef6f1a0038b1a0b86de28'/>
<id>urn:sha1:ec9c06831e7fcd01e0cef6f1a0038b1a0b86de28</id>
<content type='text'>
Make sure that the Meson pinctrl driver is built whenever Meson
support is enabled.

Signed-off-by: Beniamino Galvani &lt;b.galvani@gmail.com&gt;
Signed-off-by: Carlo Caione &lt;carlo@endlessm.com&gt;
Acked-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>ARM: meson: enable L2 cache</title>
<updated>2014-11-18T15:35:01+00:00</updated>
<author>
<name>Beniamino Galvani</name>
<email>b.galvani@gmail.com</email>
</author>
<published>2014-11-18T14:25:41+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=6a4ccd9a8e7cc2169b1c623d98d01201e9dcbacc'/>
<id>urn:sha1:6a4ccd9a8e7cc2169b1c623d98d01201e9dcbacc</id>
<content type='text'>
This enables the L2 cache controller available in Amlogic SoCs.

Signed-off-by: Beniamino Galvani &lt;b.galvani@gmail.com&gt;
Acked-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Signed-off-by: Carlo Caione &lt;carlo@caione.org&gt;
</content>
</entry>
<entry>
<title>ARM: meson: add meson8 support</title>
<updated>2014-11-18T15:34:45+00:00</updated>
<author>
<name>Beniamino Galvani</name>
<email>b.galvani@gmail.com</email>
</author>
<published>2014-10-05T21:59:13+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=e790af67b2f8579ab0c46b6e011111ce2200cfe3'/>
<id>urn:sha1:e790af67b2f8579ab0c46b6e011111ce2200cfe3</id>
<content type='text'>
Add a MACH_MESON8 symbol and add "amlogic,meson8" to the list of
compatible strings for the Meson DT machine to support devices based
on the Meson8 family of SoCs.

Signed-off-by: Beniamino Galvani &lt;b.galvani@gmail.com&gt;
Acked-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Signed-off-by: Carlo Caione &lt;carlo@caione.org&gt;
</content>
</entry>
<entry>
<title>ARM: meson: add basic support for MesonX SoCs</title>
<updated>2014-09-25T15:34:42+00:00</updated>
<author>
<name>Carlo Caione</name>
<email>carlo@caione.org</email>
</author>
<published>2014-09-10T20:16:59+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=3b8f5030ddcf51112542e1e6ef27da237642069d'/>
<id>urn:sha1:3b8f5030ddcf51112542e1e6ef27da237642069d</id>
<content type='text'>
This patch adds the basic machine file for the MesonX SoCs. Only Meson6
is populated.

Signed-off-by: Carlo Caione &lt;carlo@caione.org&gt;
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
</entry>
</feed>
