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<title>BMC/Intel-BMC/linux.git/arch/arm/mach-aspeed, branch dev</title>
<subtitle>Intel OpenBMC Linux kernel source tree (mirror)</subtitle>
<id>https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev</id>
<link rel='self' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev'/>
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<updated>2015-10-16T05:11:19+00:00</updated>
<entry>
<title>arm/mach-aspeed: Enable UART clock divisor</title>
<updated>2015-10-16T05:11:19+00:00</updated>
<author>
<name>Jeremy Kerr</name>
<email>jk@ozlabs.org</email>
</author>
<published>2015-10-16T01:53:55+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=5eeaca7a5dec02e1e5e2b8fb8bf2527ea8eb1dcb'/>
<id>urn:sha1:5eeaca7a5dec02e1e5e2b8fb8bf2527ea8eb1dcb</id>
<content type='text'>
Our .dts assumes that the UART clock is divided by 13, but different
u-boots may leave this bit in different states. Initialise it in
aspeed_early_init explicitly.

Signed-off-by: Jeremy Kerr &lt;jk@ozlabs.org&gt;
</content>
</entry>
<entry>
<title>i2c: fix crap driver so it works</title>
<updated>2015-09-14T11:47:19+00:00</updated>
<author>
<name>Joel Stanley</name>
<email>joel@jms.id.au</email>
</author>
<published>2015-08-12T07:27:07+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=bdc2406901b1f2bffdbe2b7830c93e6d0ba0d458'/>
<id>urn:sha1:bdc2406901b1f2bffdbe2b7830c93e6d0ba0d458</id>
<content type='text'>
Only the first I2C master for now
</content>
</entry>
<entry>
<title>gpio: Add Aspeed AST2400 driver</title>
<updated>2015-09-14T11:47:16+00:00</updated>
<author>
<name>Joel Stanley</name>
<email>joel@jms.id.au</email>
</author>
<published>2015-07-07T05:58:18+00:00</published>
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<id>urn:sha1:72ff807490435fba5ea5eb0b1197e86c94f168c5</id>
<content type='text'>
Signed-off-by: Joel Stanley &lt;joel@jms.id.au&gt;
</content>
</entry>
<entry>
<title>aspeed: Build sram driver</title>
<updated>2015-09-14T11:47:15+00:00</updated>
<author>
<name>Joel Stanley</name>
<email>joel@jms.id.au</email>
</author>
<published>2015-06-18T07:14:14+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=c1f46a6de3a8395c43a08075b71f833d96f97ac8'/>
<id>urn:sha1:c1f46a6de3a8395c43a08075b71f833d96f97ac8</id>
<content type='text'>
We have a 32K chunk of SRAM on the AHB bus. Use the existing driver to
provide access to the memory via genalloc.

Signed-off-by: Joel Stanley &lt;joel@jms.id.au&gt;
</content>
</entry>
<entry>
<title>rtc: Add Aspeed AST2400 rtc driver</title>
<updated>2015-09-14T11:47:09+00:00</updated>
<author>
<name>Joel Stanley</name>
<email>joel@jms.id.au</email>
</author>
<published>2015-06-04T07:56:33+00:00</published>
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<id>urn:sha1:23c9eaea1e07f146a244c47344557b7c57edeab5</id>
<content type='text'>
Read and writes the time to the non-battery backed RTC in the Aspeed
AST2400 system on chip.

TODO: support timer functionality.

Signed-off-by: Joel Stanley &lt;joel@jms.id.au&gt;
</content>
</entry>
<entry>
<title>watchdog: Add Aspeed ast2400 watchdog driver</title>
<updated>2015-09-14T11:46:37+00:00</updated>
<author>
<name>Joel Stanley</name>
<email>joel@jms.id.au</email>
</author>
<published>2015-05-18T02:30:41+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=50381f01edb31707adf8c5d91aaef747da54efed'/>
<id>urn:sha1:50381f01edb31707adf8c5d91aaef747da54efed</id>
<content type='text'>
We now use a notifier to perform reset, so the reboot callback can be
removed from the platform code.

Signed-off-by: Joel Stanley &lt;joel@jms.id.au&gt;
</content>
</entry>
<entry>
<title>aspeed: Register APB clock with clk subsystem</title>
<updated>2015-09-14T11:45:36+00:00</updated>
<author>
<name>Joel Stanley</name>
<email>joel@jms.id.au</email>
</author>
<published>2015-06-04T03:17:22+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=e5f91070296026900f983c8d3ab9a52dd452f466'/>
<id>urn:sha1:e5f91070296026900f983c8d3ab9a52dd452f466</id>
<content type='text'>
This uses the fixed clock that Ben added to the device tree. It allows
us to use the clock framework to query speeds from drivers.
</content>
</entry>
<entry>
<title>aspeed: Add syscon device to platform</title>
<updated>2015-09-14T11:45:35+00:00</updated>
<author>
<name>Joel Stanley</name>
<email>joel@jms.id.au</email>
</author>
<published>2015-06-01T08:23:58+00:00</published>
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<id>urn:sha1:4e9753e230c8f101c5e107bed267367b1b93578c</id>
<content type='text'>
Adds the device tree and kconfig options. The reg and interrupt
properties should be correct.

Doesn't do anything yet.

Signed-off-by: Joel Stanley &lt;joel@jms.id.au&gt;
</content>
</entry>
<entry>
<title>pinctl: Add Aspeed driver</title>
<updated>2015-09-14T11:45:34+00:00</updated>
<author>
<name>Joel Stanley</name>
<email>joel@jms.id.au</email>
</author>
<published>2015-05-18T07:04:02+00:00</published>
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<id>urn:sha1:fabab4c400a28067244d877b947c7ff94beff51e</id>
<content type='text'>
Doesn't do anything yet.

Signed-off-by: Joel Stanley &lt;joel@jms.id.au&gt;
</content>
</entry>
<entry>
<title>aspeed: Use defines for aspeed machine</title>
<updated>2015-09-14T11:45:32+00:00</updated>
<author>
<name>Joel Stanley</name>
<email>joel@jms.id.au</email>
</author>
<published>2015-05-18T02:28:58+00:00</published>
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<id>urn:sha1:0662577b7e1119dabee0f90d32f9dc0b18a00842</id>
<content type='text'>
</content>
</entry>
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