<feed xmlns='http://www.w3.org/2005/Atom'>
<title>BMC/Intel-BMC/linux.git/arch/arm/kernel/smp_scu.c, branch dev</title>
<subtitle>Intel OpenBMC Linux kernel source tree (mirror)</subtitle>
<id>https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev</id>
<link rel='self' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/'/>
<updated>2014-08-02T07:51:53+00:00</updated>
<entry>
<title>ARM: 8122/1: smp_scu: enable SCU standby support</title>
<updated>2014-08-02T07:51:53+00:00</updated>
<author>
<name>Shawn Guo</name>
<email>shawn.guo@linaro.org</email>
</author>
<published>2014-07-31T01:07:37+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=c716483c3db10b31bf9bf43c5f45f2c3117ca13a'/>
<id>urn:sha1:c716483c3db10b31bf9bf43c5f45f2c3117ca13a</id>
<content type='text'>
With SCU standby enabled, SCU CLK will be turned off when all processors
are in WFI mode.  And the clock will be turned on when any processor
leaves WFI mode.

This behavior should be preferable in terms of power efficiency of
system idle.  So let's set the SCU standby bit to enable the support in
function scu_enable().

Cortex-A9 earlier than r2p0 has no standby bit in SCU, so we need to
skip setting the bit for those.

Signed-off-by: Shawn Guo &lt;shawn.guo@freescale.com&gt;
Acked-by: Soren Brinkmann &lt;soren.brinkmann@xilinx.com&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
</entry>
<entry>
<title>ARM: 8121/1: smp_scu: use macro for SCU enable bit</title>
<updated>2014-08-02T07:51:52+00:00</updated>
<author>
<name>Shawn Guo</name>
<email>shawn.guo@linaro.org</email>
</author>
<published>2014-07-31T01:07:00+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=f8f3d4ed0d64c59296d79e9d219d8f388562de35'/>
<id>urn:sha1:f8f3d4ed0d64c59296d79e9d219d8f388562de35</id>
<content type='text'>
Use macro instead of magic number for SCU enable bit.

Signed-off-by: Shawn Guo &lt;shawn.guo@freescale.com&gt;
Acked-by: Soren Brinkmann &lt;soren.brinkmann@xilinx.com&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
</entry>
<entry>
<title>ARM: smp_scu: data endian fixes</title>
<updated>2013-10-19T19:46:33+00:00</updated>
<author>
<name>Ben Dooks</name>
<email>ben.dooks@codethink.co.uk</email>
</author>
<published>2013-02-07T11:14:21+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=099a4809133dc6548d37cc143ab0cb9c2eba97bb'/>
<id>urn:sha1:099a4809133dc6548d37cc143ab0cb9c2eba97bb</id>
<content type='text'>
The smp_scu driver needs to use the relaxed readl/write accessors
to avoid any issues with the endian mode the processor core is in.

Reviewed-by: Will Deacon &lt;will.deacon@arm.com&gt;
Signed-off-by: Ben Dooks &lt;ben.dooks@codethink.co.uk&gt;
</content>
</entry>
<entry>
<title>Merge branch 'for-next' of git://git.pengutronix.de/git/ukl/linux into devel-stable</title>
<updated>2013-03-09T15:49:32+00:00</updated>
<author>
<name>Russell King</name>
<email>rmk+kernel@arm.linux.org.uk</email>
</author>
<published>2013-03-09T15:49:32+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=73a09d212ec65b7068a283e6034fa05649d3d075'/>
<id>urn:sha1:73a09d212ec65b7068a283e6034fa05649d3d075</id>
<content type='text'>
Conflicts:
	arch/arm/include/asm/cputype.h

Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
</entry>
<entry>
<title>ARM: use read_cpuid_id() instead of read_cpuid(CPUID_ID)</title>
<updated>2013-01-31T20:44:47+00:00</updated>
<author>
<name>Uwe Kleine-König</name>
<email>u.kleine-koenig@pengutronix.de</email>
</author>
<published>2013-01-30T16:38:21+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=ac52e83f4c76992925e13d0f4e901ffd4c207261'/>
<id>urn:sha1:ac52e83f4c76992925e13d0f4e901ffd4c207261</id>
<content type='text'>
Both calls are identical currently. This patch prepares to deprecate
read_cpuid on machines without cp15.

Also move an unconditional usage of read_cpuid_cachetype to a more local
scope as read_cpuid_cachetype uses read_cpuid, too.

Signed-off-by: Uwe Kleine-König &lt;u.kleine-koenig@pengutronix.de&gt;
Message-Id: 1359646587-1788-1-git-send-email-u.kleine-koenig@pengutronix.de
</content>
</entry>
<entry>
<title>ARM: scu: mask cluster id from cpu_logical_map</title>
<updated>2013-01-31T19:54:16+00:00</updated>
<author>
<name>Rob Herring</name>
<email>rob.herring@calxeda.com</email>
</author>
<published>2013-01-31T19:26:29+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=c7d5b93e9834f0e6cf21828a6fbf45ac440cf364'/>
<id>urn:sha1:c7d5b93e9834f0e6cf21828a6fbf45ac440cf364</id>
<content type='text'>
With commit a0ae0240 (ARM: kernel: add device tree init map function),
the cpu id value may include the cluster id and is no longer 0-3, so we
need to mask it in scu_power_mode to get the local cpu number. Since we
are only dealing with the cpu we are running on, the cluster id should
not ever be needed.

Signed-off-by: Rob Herring &lt;rob.herring@calxeda.com&gt;
</content>
</entry>
<entry>
<title>ARM: 7347/1: SCU: use cpu_logical_map for per-CPU low power mode</title>
<updated>2012-04-28T16:31:37+00:00</updated>
<author>
<name>Will Deacon</name>
<email>will.deacon@arm.com</email>
</author>
<published>2012-02-24T11:20:16+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=0bd82adee38046fcf180a60ca56c181702287646'/>
<id>urn:sha1:0bd82adee38046fcf180a60ca56c181702287646</id>
<content type='text'>
scu_power_mode changes the power mode for the current CPU, which it
determines from smp_processor_id(). However, this assumes that the
physical CPU number is equal to Linux's logical CPU number and if this
is not true, we will power off the wrong CPU.

This patch uses cpu_logical_map to translate the logical CPU number
into a physical one in scu_power_mode.

Reported-by: Lorenzo Pieralisi &lt;Lorenzo.Pieralisi@arm.com&gt;
Signed-off-by: Will Deacon &lt;will.deacon@arm.com&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
</entry>
<entry>
<title>Merge branches 'arnd-randcfg-fixes', 'debug', 'io' (early part), 'l2x0', 'p2v', 'pgt' (early part) and 'smp' into for-linus</title>
<updated>2011-10-25T07:19:29+00:00</updated>
<author>
<name>Russell King</name>
<email>rmk+kernel@arm.linux.org.uk</email>
</author>
<published>2011-10-25T07:19:29+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=06afb1a087d49ae0f676b2e5b9ffe5f4b3aba355'/>
<id>urn:sha1:06afb1a087d49ae0f676b2e5b9ffe5f4b3aba355</id>
<content type='text'>
</content>
</entry>
<entry>
<title>ARM: 7100/1: smp_scu: remove __init annotation from scu_enable()</title>
<updated>2011-10-17T08:02:43+00:00</updated>
<author>
<name>Shawn Guo</name>
<email>shawn.guo@linaro.org</email>
</author>
<published>2011-09-25T07:25:43+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=26a527e69d6e6077bff9e2cddcb08337ac33a52d'/>
<id>urn:sha1:26a527e69d6e6077bff9e2cddcb08337ac33a52d</id>
<content type='text'>
When Cortex-A9 MPCore resumes from Dormant or Shutdown modes,
SCU needs to be re-enabled.  This patch removes __init annotation
from function scu_enable(), so that platform resume procedure can
call it to re-enable SCU.

Signed-off-by: Shawn Guo &lt;shawn.guo@linaro.org&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
</entry>
<entry>
<title>ARM: 7091/1: errata: D-cache line maintenance operation by MVA may not succeed</title>
<updated>2011-09-17T11:47:17+00:00</updated>
<author>
<name>Will Deacon</name>
<email>will.deacon@arm.com</email>
</author>
<published>2011-09-15T10:45:15+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=f630c1bdfbf8fe423325beaf60027cfc7fd7c610'/>
<id>urn:sha1:f630c1bdfbf8fe423325beaf60027cfc7fd7c610</id>
<content type='text'>
This patch implements a workaround for erratum 764369 affecting
Cortex-A9 MPCore with two or more processors (all current revisions).
Under certain timing circumstances, a data cache line maintenance
operation by MVA targeting an Inner Shareable memory region may fail to
proceed up to either the Point of Coherency or to the Point of
Unification of the system. This workaround adds a DSB instruction before
the relevant cache maintenance functions and sets a specific bit in the
diagnostic control register of the SCU.

Cc: &lt;stable@kernel.org&gt;
Signed-off-by: Will Deacon &lt;will.deacon@arm.com&gt;
Signed-off-by: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
Tested-by: Mark Rutland &lt;mark.rutland@arm.com&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
</entry>
</feed>
