<feed xmlns='http://www.w3.org/2005/Atom'>
<title>BMC/Intel-BMC/linux.git/arch/arm/kernel/perf_event_v7.c, branch dev</title>
<subtitle>Intel OpenBMC Linux kernel source tree (mirror)</subtitle>
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<updated>2015-05-28T15:54:18+00:00</updated>
<entry>
<title>arm: perf: factor out armv7 pmu driver</title>
<updated>2015-05-28T15:54:18+00:00</updated>
<author>
<name>Mark Rutland</name>
<email>mark.rutland@arm.com</email>
</author>
<published>2015-05-26T16:23:38+00:00</published>
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<id>urn:sha1:29ba0f37f1578db268ac805c117365923b9a7663</id>
<content type='text'>
Now that the core arm perf code maintains no global state and all
microarchitecture-specific PMU data can be fed in through the shared
probe function, it's possible to use it as a library and get rid of the
C file includes we have currently.

This patch factors out the ARMv7-specific portions out into the ARMv7
driver. For the moment this is always built if perf event support is
enabled, but the preprocessor guards will leave behind an empty file.

Now that perf_event_cpu.c contains no microarchitecture-specific data,
the associated probing code is removed, completing its relegation to a
library file. The vestigal "arm-pmu" platform device ID is removed in
this patch, as it has been unused since platform files were updated to
specify a more specific PMU variant.

Signed-off-by: Mark Rutland &lt;mark.rutland@arm.com&gt;
Signed-off-by: Will Deacon &lt;will.deacon@arm.com&gt;
</content>
</entry>
<entry>
<title>arm: perf: probe number of counters on affine CPUs</title>
<updated>2015-05-27T15:12:36+00:00</updated>
<author>
<name>Mark Rutland</name>
<email>mark.rutland@arm.com</email>
</author>
<published>2015-05-13T16:12:27+00:00</published>
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<id>urn:sha1:0e3038d18adcecf375c39ef5b39eb3c613293280</id>
<content type='text'>
In heterogeneous systems, the number of counters may differ across
clusters. To find the number of counters for a cluster, we must probe
the PMU from a CPU in that cluster.

Reviewed-by: Will Deacon &lt;will.deacon@arm.com&gt;
Signed-off-by: Mark Rutland &lt;mark.rutland@arm.com&gt;
Signed-off-by: Will Deacon &lt;will.deacon@arm.com&gt;
</content>
</entry>
<entry>
<title>ARM: perf: Add support for Scorpion PMUs</title>
<updated>2015-03-17T18:34:01+00:00</updated>
<author>
<name>Stephen Boyd</name>
<email>sboyd@codeaurora.org</email>
</author>
<published>2015-02-28T00:11:35+00:00</published>
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<id>urn:sha1:341e42c4e3f97af9bbeada64c3e1a41f65ce086a</id>
<content type='text'>
Scorpion supports a set of local performance monitor event
selection registers (LPM) sitting behind a cp15 based interface
that extend the architected PMU events to include Scorpion CPU
and Venum VFP specific events. To use these events the user is
expected to program the lpm register with the event code shifted
into the group they care about and then point the PMNx event at
that region+group combo by writing a LPMn_GROUPx event. Add
support for this hardware.

Note: the raw event number is a pure software construct that
allows us to map the multi-dimensional number space of regions,
groups, and event codes into a flat event number space suitable
for use by the perf framework.

This is based on code originally written by Sheetal Sahasrabudhe,
Ashwin Chaugule, and Neil Leeder [1].

[1] https://www.codeaurora.org/cgit/quic/la/kernel/msm/tree/arch/arm/kernel/perf_event_msm.c?h=msm-3.4

Cc: Mark Rutland &lt;mark.rutland@arm.com&gt;
Cc: Neil Leeder &lt;nleeder@codeaurora.org&gt;
Cc: Ashwin Chaugule &lt;ashwinc@codeaurora.org&gt;
Cc: Sheetal Sahasrabudhe &lt;sheetals@codeaurora.org&gt;
Cc: &lt;devicetree@vger.kernel.org&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
Signed-off-by: Will Deacon &lt;will.deacon@arm.com&gt;
</content>
</entry>
<entry>
<title>ARM: perf: Only reset PMxEVCNTCR registers on reset</title>
<updated>2015-03-17T18:34:01+00:00</updated>
<author>
<name>Stephen Boyd</name>
<email>sboyd@codeaurora.org</email>
</author>
<published>2015-02-28T00:11:34+00:00</published>
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<id>urn:sha1:934999185edd613ca80916d238ba7393b84ae53c</id>
<content type='text'>
The Krait specific PMxEVCNTCR register is unpredictable upon
reset. Currently we clear the register before we setup an event,
but we don't need to do that. Instead, we can iterate through all
the events and clear them once when we reset the PMU, saving a
write in the event setup path.

Cc: Neil Leeder &lt;nleeder@codeaurora.org&gt;
Cc: Ashwin Chaugule &lt;ashwinc@codeaurora.org&gt;
Cc: Sheetal Sahasrabudhe &lt;sheetals@codeaurora.org&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
Signed-off-by: Will Deacon &lt;will.deacon@arm.com&gt;
</content>
</entry>
<entry>
<title>ARM: perf: Preparatory work for Scorpion PMU support</title>
<updated>2015-03-17T18:34:01+00:00</updated>
<author>
<name>Stephen Boyd</name>
<email>sboyd@codeaurora.org</email>
</author>
<published>2015-02-28T00:11:33+00:00</published>
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<id>urn:sha1:65bab45113a2c5e9f13bc8cc3f6fea92f467d417</id>
<content type='text'>
Do some things to make the Krait PMU support code generic enough
to be used by the Scorpion PMU support code.

 * Rename the venum register functions to be venum instead of krait
   specific because the same registers exist on Scorpion

 * Add some macros to decode our Krait specific event encoding that's
   the same on Scorpion (modulo an extra region).

 * Drop 'krait' from krait_clear_pmresrn_group() so it can be used
   by Scorpion code

Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
Signed-off-by: Will Deacon &lt;will.deacon@arm.com&gt;
</content>
</entry>
<entry>
<title>arm: perf: kill get_hw_events()</title>
<updated>2014-10-30T12:17:00+00:00</updated>
<author>
<name>Mark Rutland</name>
<email>mark.rutland@arm.com</email>
</author>
<published>2014-05-13T18:36:31+00:00</published>
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<id>urn:sha1:116792508607002896b706fbad8310419fcc5742</id>
<content type='text'>
Now that the arm pmu code is limited to CPU PMUs the get_hw_events()
function is superfluous, as we'll always have a set of per-cpu
pmu_hw_events structures.

This patch removes the get_hw_events() function, replacing it with
a percpu hw_events pointer. Uses of get_hw_events are updated to use
this_cpu_ptr.

Signed-off-by: Mark Rutland &lt;mark.rutland@arm.com&gt;
Reviewed-by: Will Deacon &lt;will.deacon@arm.com&gt;
Reviewed-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
Signed-off-by: Will Deacon &lt;will.deacon@arm.com&gt;
</content>
</entry>
<entry>
<title>ARM: perf: use pr_* instead of printk</title>
<updated>2014-10-30T12:16:58+00:00</updated>
<author>
<name>Will Deacon</name>
<email>will.deacon@arm.com</email>
</author>
<published>2014-10-30T11:26:57+00:00</published>
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<id>urn:sha1:52a5566e7617ce2678c2a35c7982b808cb2b53f6</id>
<content type='text'>
There are a few remaining uses of printk in the ARM perf code, so move
them over to the pr_* variants instead.

Reported-by: Russell King &lt;linux@arm.linux.org.uk&gt;
Signed-off-by: Will Deacon &lt;will.deacon@arm.com&gt;
</content>
</entry>
<entry>
<title>ARM: perf: remove useless return and check of idx in counter handling</title>
<updated>2014-10-30T12:16:58+00:00</updated>
<author>
<name>chai wen</name>
<email>chaiw.fnst@cn.fujitsu.com</email>
</author>
<published>2014-10-22T12:16:49+00:00</published>
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<id>urn:sha1:cb6eb108a7be04709f8db0cedde30bee0e0a64ee</id>
<content type='text'>
Idx sanity check was once implemented separately in these counter
handling functions and then return value was treated as a judgement.
	armv7_pmnc_select_counter()
	armv7_pmnc_enable_counter()
	armv7_pmnc_disable_counter()
	armv7_pmnc_enable_intens()
	armv7_pmnc_disable_intens()
But we do not need to do this now, as idx validation check was moved
out all these functions by commit 7279adbd9bb8ef8f(ARM: perf: check ARMv7
counter validity on a per-pmu basis).
Let's remove the useless return of idx from these functions.

Acked-by: Mark Rutland &lt;mark.rutland@arm.com&gt;
Signed-off-by: chai wen &lt;chaiw.fnst@cn.fujitsu.com&gt;
Signed-off-by: Will Deacon &lt;will.deacon@arm.com&gt;
</content>
</entry>
<entry>
<title>arm: perf: krait: stop using singleton PMU</title>
<updated>2014-07-02T14:48:26+00:00</updated>
<author>
<name>Mark Rutland</name>
<email>mark.rutland@arm.com</email>
</author>
<published>2014-05-21T17:06:13+00:00</published>
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<id>urn:sha1:037e79aa958d325cfb3c733496af64199bba6b49</id>
<content type='text'>
Currently the krait_pmu_{enable,disable}_event functions use the global
cpu_pmu variable while all the other pmu enable/disable functions
derive this from the event argument.

This patch brings the Krait functions into line with the rest of the PMU
backends by deriving the address of the pmu from the event argument.

Acked-by: Will Deacon &lt;will.deacon@arm.com&gt;
Acked-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
Tested-by: Christopher Covington &lt;cov@codeaurora.org&gt;
Signed-off-by: Mark Rutland &lt;mark.rutland@arm.com&gt;
Signed-off-by: Will Deacon &lt;will.deacon@arm.com&gt;
</content>
</entry>
<entry>
<title>arm: perf: clean up PMU names</title>
<updated>2014-07-02T14:48:25+00:00</updated>
<author>
<name>Mark Rutland</name>
<email>mark.rutland@arm.com</email>
</author>
<published>2012-12-19T16:33:24+00:00</published>
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<id>urn:sha1:3d1ff755e36705ad9ec96f740edc08d20c3e9a87</id>
<content type='text'>
The perf userspace tools can't handle dashes or spaces in PMU names,
which conflicts with the current naming scheme in the arm perf backend.
This prevents these PMUs from being accessed by name from the perf
tools. Additionally the ARMv6 pmus are named "v6", which does not fully
distinguish them in the sys/bus/event_source namespace.

This patch renames the PMUs consistently to a lower case form with
underscores, e.g. "armv6_1176", "armv7_cortex_a9". This is both readily
accepted by today's perf tool, and far easier to type than the
(apparently unused) convention in use previously. The OProfile name
conversion code is updated to handle this.

Due to a copy-paste error involving two "xscale1" entries, "xscale2" has
never been matched by the name OProfile name mapping. While we're
updating names, this is corrected.

Acked-by: Will Deacon &lt;will.deacon@arm.com&gt;
Tested-by: Christopher Covington &lt;cov@codeaurora.org&gt;
Signed-off-by: Mark Rutland &lt;mark.rutland@arm.com&gt;
[sachin: fixed missing semicolons in armv6 backend]
Signed-off-by: Sachin Kamat &lt;sachin.kamat@samsung.com&gt;
Signed-off-by: Will Deacon &lt;will.deacon@arm.com&gt;
</content>
</entry>
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