<feed xmlns='http://www.w3.org/2005/Atom'>
<title>BMC/Intel-BMC/linux.git/arch/arm/include/debug, branch dev-4.7</title>
<subtitle>Intel OpenBMC Linux kernel source tree (mirror)</subtitle>
<id>https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev-4.7</id>
<link rel='self' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev-4.7'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/'/>
<updated>2016-03-02T22:30:17+00:00</updated>
<entry>
<title>Merge tag 'imx-soc-4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/soc</title>
<updated>2016-03-02T22:30:17+00:00</updated>
<author>
<name>Arnd Bergmann</name>
<email>arnd@arndb.de</email>
</author>
<published>2016-03-02T22:30:17+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=f3a186fbfd413f2453c511da2dbcdc594c87dbde'/>
<id>urn:sha1:f3a186fbfd413f2453c511da2dbcdc594c87dbde</id>
<content type='text'>
Merge "i.MX SoC update for 4.6" from Shawn Guo:

- Enable big endian mode support for i.MX platform
- Add support for i.MX6QP SoC which is the latest i.MX6 family addition
- Add basic suspend/resume support for i.MX25
- A couple of i.MX7D support updates
- A few random code cleanups

* tag 'imx-soc-4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  ARM: imx: Make reset_control_ops const
  ARM: imx: Do L2 errata only if the L2 cache isn't enabled
  ARM: imx: select ARM_CPU_SUSPEND only for imx6
  ARM: mx25: Add basic suspend/resume support
  ARM: imx: Add msl code support for imx6qp
  ARM: imx: enable big endian mode
  ARM: imx: use endian-safe readl/readw/writel/writew
  ARM: imx7d: correct chip version information
  ARM: imx: select HAVE_ARM_ARCH_TIMER if selected i.MX7D
  ARM: imx6: fix cleanup path in imx6q_suspend_init()
</content>
</entry>
<entry>
<title>ARM: at91: avoid defining CONFIG_* symbols in source code</title>
<updated>2016-03-02T16:31:08+00:00</updated>
<author>
<name>Arnd Bergmann</name>
<email>arnd@arndb.de</email>
</author>
<published>2016-02-23T14:39:38+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=e91fb3bd757569aca48785358a4adbf41334d382'/>
<id>urn:sha1:e91fb3bd757569aca48785358a4adbf41334d382</id>
<content type='text'>
In an invalid randconfig build (fixed by another patch),
I ran across this warning:

arch/arm/include/debug/at91.S:18:0: error: "CONFIG_DEBUG_UART_VIRT" redefined [-Werror]
 #define CONFIG_DEBUG_UART_VIRT AT91_IO_P2V(CONFIG_DEBUG_UART_PHYS)

As Russell pointed out, we should never #define a macro starting
with CONFIG_ in a source file, as that is rather confusing.

This renames the macro to avoid the symbol clash.

Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Suggested-by: Russell King &lt;linux@arm.linux.org.uk&gt;
Acked-by: Alexandre Belloni &lt;alexandre.belloni@free-electrons.com&gt;
Acked-by: Nicolas Ferre &lt;nicolas.ferre@atmel.com&gt;
</content>
</entry>
<entry>
<title>Merge tag 'zynq-soc-for-4.6' of https://github.com/Xilinx/linux-xlnx into next/soc</title>
<updated>2016-02-26T21:54:53+00:00</updated>
<author>
<name>Arnd Bergmann</name>
<email>arnd@arndb.de</email>
</author>
<published>2016-02-26T21:54:53+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=e7ada8dfd564d9fa518432a513994cc53e358fad'/>
<id>urn:sha1:e7ada8dfd564d9fa518432a513994cc53e358fad</id>
<content type='text'>
Merge "ARM: Xilinx Zynq patches for v4.6" from Michal Simek:

- SLCR early init
- Fix L2 cache data corruption
- Fix early printk uart setting

* tag 'zynq-soc-for-4.6' of https://github.com/Xilinx/linux-xlnx:
  ARM: zynq: Move early printk virtual address to vmalloc area
  ARM: zynq: address L2 cache data corruption
  ARM: zynq: initialize slcr mapping earlier
</content>
</entry>
<entry>
<title>ARM: zynq: Move early printk virtual address to vmalloc area</title>
<updated>2016-02-25T13:06:03+00:00</updated>
<author>
<name>Michal Simek</name>
<email>michal.simek@xilinx.com</email>
</author>
<published>2016-02-15T09:17:47+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=8fff2f752f2c9d31414f83170157701b59aec4c1'/>
<id>urn:sha1:8fff2f752f2c9d31414f83170157701b59aec4c1</id>
<content type='text'>
The patch
"ARM: 8432/1: move VMALLOC_END from 0xff000000 to 0xff800000"
(sha1: 6ff0966052c46efb53980b8a1add2e7b49c9f560)
has moved also start of VMALLOC area because size didn't change.
That's why origin location of vmalloc was
   vmalloc : 0xf0000000 - 0xff000000   ( 240 MB)
and now is
   vmalloc : 0xf0800000 - 0xff800000   ( 240 MB)

That's why uart virtual addresses need to be changed to reflect this new
memory setup. Starting address should be vmalloc start address.

Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
Acked-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
</entry>
<entry>
<title>ARM: debug: add support for Palmchip BK-310x UART</title>
<updated>2016-02-08T21:52:34+00:00</updated>
<author>
<name>Mans Rullgard</name>
<email>mans@mansr.com</email>
</author>
<published>2016-02-05T09:49:22+00:00</published>
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<id>urn:sha1:0c5325466d5d4816c9bd13c56746aa26ed66231d</id>
<content type='text'>
Some SoCs use a Palmchip BK-310x UART which is mostly 16550 compatible
but with a different register layout. While this UART has previously
only been supported in MIPS based chips (Alchemy, Ralink), the ARM based
SMP87xx series from Sigma Designs also uses it.

This patch allows the debug console to work with this type of UART.

Signed-off-by: Mans Rullgard &lt;mans@mansr.com&gt;
Signed-off-by: Marc Gonzalez &lt;marc_gonzalez@sigmadesigns.com&gt;
Acked-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Acked-by: Kevin Hilman &lt;khilman@baylibre.com&gt;
Signed-off-by: Olof Johansson &lt;olof@lixom.net&gt;
</content>
</entry>
<entry>
<title>ARM: imx: enable big endian mode</title>
<updated>2016-02-02T05:31:19+00:00</updated>
<author>
<name>Johannes Berg</name>
<email>johannes@sipsolutions.net</email>
</author>
<published>2016-01-27T16:59:36+00:00</published>
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<id>urn:sha1:26e30c6489f4774492c168c7b953e575a16765f7</id>
<content type='text'>
Enable ARM big-endian mode on mach-imx. This requires adding some
byte swapping in the debug functions (which otherwise hang forever)
and of course the secondary core bringup.

Tested (on top of 4.4) on i.MX6 HummingBoard quad-core (IMX6Q).

The patch is pretty much as suggested by Arnd Bergmann, thanks!

Signed-off-by: Johannes Berg &lt;johannes@sipsolutions.net&gt;
Signed-off-by: Shawn Guo &lt;shawnguo@kernel.org&gt;
</content>
</entry>
<entry>
<title>ARM: debug-ll: rework footbridge handling</title>
<updated>2015-12-15T22:43:29+00:00</updated>
<author>
<name>Arnd Bergmann</name>
<email>arnd@arndb.de</email>
</author>
<published>2015-12-03T17:27:53+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=0045c0dd2f643b74f7089253d6ffa1bbb72d3d87'/>
<id>urn:sha1:0045c0dd2f643b74f7089253d6ffa1bbb72d3d87</id>
<content type='text'>
Footbridge has two debug ports that are handled a bit differently:

The 8250 port uses the normal debug/8250.S implementation that is shared
with a lot of other platforms, but it relies on the DEBUG_UART_8250
option to be turned on automatically instead of being selected by
DEBUG_FOOTBRIDGE_COM1 as we do for most other platforms. I'm changing
this to use a 'select' and change the dependency to the debug symbol
rather than the platform symbol for consistency.

The DC21285 UART has a separate top-level option, and relies on
the traditional include/mach/debug-macro.S method. With the s3c64xx
multiplatform series queued up for 4.5, it is now the last one that does
this, so by moving this file to include/debug/dc21285.S, we can get
all platforms to do things the same way.

Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
</entry>
<entry>
<title>ARM: at91: debug: use DEBUG_UART_PHYS</title>
<updated>2015-09-21T14:31:15+00:00</updated>
<author>
<name>Alexandre Belloni</name>
<email>alexandre.belloni@free-electrons.com</email>
</author>
<published>2015-08-08T10:11:11+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=6f112a08c1ed717a015dae190e289d53085c1bc4'/>
<id>urn:sha1:6f112a08c1ed717a015dae190e289d53085c1bc4</id>
<content type='text'>
Instead of having to add a new configuration option each time support for
new SoC is added, use CONFIG_DEBUG_UART_PHYS. For now,
CONFIG_DEBUG_UART_VIRT is automatically computed.

Signed-off-by: Alexandre Belloni &lt;alexandre.belloni@free-electrons.com&gt;
Signed-off-by: Nicolas Ferre &lt;nicolas.ferre@atmel.com&gt;
</content>
</entry>
<entry>
<title>Merge tag 'imx-soc-4.3' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/soc</title>
<updated>2015-08-18T20:10:05+00:00</updated>
<author>
<name>Olof Johansson</name>
<email>olof@lixom.net</email>
</author>
<published>2015-08-18T20:10:05+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=207b504a63b849519cc285c3ddb37411d67beead'/>
<id>urn:sha1:207b504a63b849519cc285c3ddb37411d67beead</id>
<content type='text'>
The i.MX SoC changes for 4.3:
 - Add i.MX6 Ultralite SoC support, which is the newest addition to
   i.MX6 family.  It integrates a single Cortex-A7 core and a power
   management module that reduces the complexity of external power
   supply and simplifies power sequencing.
 - Change SNVS RTC driver to use syscon interface for register access,
   and add SNVS power key driver support.
 - Add a second clock for mxc rtc driver, and support device tree probe
   for the driver.
 - Add FEC MAC reference clock and phy fixup initialization for i.MX6UL
   platform.

* tag 'imx-soc-4.3' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  rtc: snvs: select option REGMAP_MMIO
  ARM: imx6ul: add fec MAC refrence clock and phy fixup init
  ARM: imx6ul: add fec bits to GPR syscon definition
  rtc: mxc: add support of device tree
  dt-binding: document the binding for mxc rtc
  rtc: mxc: use a second rtc clock
  input: snvs_pwrkey: use "wakeup-source" as deivce tree property name
  Document: devicetree: input: imx: i.mx snvs power device tree bindings
  input: keyboard: imx: add snvs power key driver
  Document: dt: fsl: snvs: change support syscon
  rtc: snvs: use syscon to access register
  ARM: imx: add low-level debug support for i.mx6ul
  ARM: imx: add i.mx6ul msl support

Signed-off-by: Olof Johansson &lt;olof@lixom.net&gt;
</content>
</entry>
<entry>
<title>Merge tag 'zynq-soc-for-4.3' of https://github.com/Xilinx/linux-xlnx into next/soc</title>
<updated>2015-08-05T08:53:52+00:00</updated>
<author>
<name>Olof Johansson</name>
<email>olof@lixom.net</email>
</author>
<published>2015-08-05T08:53:52+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=b69354dfe25bf0b103ef3ed6c881d34cc442265c'/>
<id>urn:sha1:b69354dfe25bf0b103ef3ed6c881d34cc442265c</id>
<content type='text'>
arm: Xilinx Zynq SoC patches for v4.2

- Fix earlyprintk, jump trampoline for SMP
- Update git tree location
- Setup PL310 aux (bit 22)

* tag 'zynq-soc-for-4.3' of https://github.com/Xilinx/linux-xlnx:
  ARM: zynq: reserve space for jump target in secondary trampoline
  clk: zynq: remove redundant $(CONFIG_ARCH_ZYNQ) in Makefile
  MAINTAINERS: Update Zynq git tree location
  ARM: zynq: Set bit 22 in PL310 AuxCtrl register (6395/1)
  ARM: zynq: Fix earlyprintk in big endian mode

Signed-off-by: Olof Johansson &lt;olof@lixom.net&gt;
</content>
</entry>
</feed>
