<feed xmlns='http://www.w3.org/2005/Atom'>
<title>BMC/Intel-BMC/linux.git/arch/arm/include/asm/pci.h, branch dev</title>
<subtitle>Intel OpenBMC Linux kernel source tree (mirror)</subtitle>
<id>https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev</id>
<link rel='self' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/'/>
<updated>2015-06-08T12:56:43+00:00</updated>
<entry>
<title>PCI: Remove unused pci_dma_burst_advice()</title>
<updated>2015-06-08T12:56:43+00:00</updated>
<author>
<name>Bjorn Helgaas</name>
<email>bhelgaas@google.com</email>
</author>
<published>2015-06-04T21:38:17+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=01d72a95188880b22190e937ed8718ed4b45bdce'/>
<id>urn:sha1:01d72a95188880b22190e937ed8718ed4b45bdce</id>
<content type='text'>
pci_dma_burst_advice() was added by e24c2d963a60 ("[PATCH] PCI: DMA
bursting advice") but apparently never used.  Remove it.

Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Acked-by: Michal Simek &lt;monstr@monstr.eu&gt;	# microblaze
CC: David S. Miller &lt;davem@davemloft.net&gt;</content>
</entry>
<entry>
<title>ARM/PCI: Move to generic PCI domains</title>
<updated>2014-12-28T01:19:18+00:00</updated>
<author>
<name>Lorenzo Pieralisi</name>
<email>lorenzo.pieralisi@arm.com</email>
</author>
<published>2014-11-21T11:29:26+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=8c7d14746abce601b768533c3ccb3f3e64f98551'/>
<id>urn:sha1:8c7d14746abce601b768533c3ccb3f3e64f98551</id>
<content type='text'>
Most if not all ARM PCI host controller device drivers either ignore the
domain field in the pci_sys_data structure or just increment it every time
a host controller is probed, using it as a domain counter.

Therefore, instead of relying on pci_sys_data to stash the domain number in
a standard location, ARM pcibios code can be moved to the newly introduced
generic PCI domains code, implemented in commits:

  41e5c0f81d3e ("of/pci: Add pci_get_new_domain_nr() and of_get_pci_domain_nr()")
  670ba0c8883b ("PCI: Add generic domain handling")

ARM code is made to select PCI_DOMAINS_GENERIC by default, which builds
core PCI code that assigns the domain number through the generic function:

  void pci_bus_assign_domain_nr(...)

that relies on a DT property to define the domain number or falls back to a
counter according to a predefined logic; its usage replaces the current
domain assignment code in PCI host controllers present in the kernel.

Tested-by: Lucas Stach &lt;l.stach@pengutronix.de&gt;
Signed-off-by: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Reviewed-by: Yijing Wang &lt;wangyijing@huawei.com&gt;
Reviewed-By: Jason Gunthorpe &lt;jgunthorpe@obsidianresearch.com&gt; # mvebu
Acked-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
Acked-by: Lucas Stach &lt;l.stach@pengutronix.de&gt;
Acked-by: Jingoo Han &lt;jg1.han@samsung.com&gt;
Acked-by: Phil Edworthy &lt;phil.edworthy@renesas.com&gt;
Acked-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
CC: Mohit Kumar &lt;mohit.kumar@st.com&gt;</content>
</entry>
<entry>
<title>PCI: Turn pcibios_penalize_isa_irq() into a weak function</title>
<updated>2014-05-27T22:23:58+00:00</updated>
<author>
<name>Hanjun Guo</name>
<email>hanjun.guo@linaro.org</email>
</author>
<published>2014-05-06T03:29:52+00:00</published>
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<id>urn:sha1:a43ae58c848cfbadaba81c8d63202b4487f922a0</id>
<content type='text'>
pcibios_penalize_isa_irq() is only implemented by x86 now, and legacy ISA
is not used by some architectures.  Make pcibios_penalize_isa_irq() a
__weak function to simplify the code.  This removes the need for new
platforms to add stub implementations of pcibios_penalize_isa_irq().

[bhelgaas: changelog, comments]
Signed-off-by: Hanjun Guo &lt;hanjun.guo@linaro.org&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Acked-by: Arnd Bergmann &lt;arnd@arndb.de&gt;</content>
</entry>
<entry>
<title>ARM: PCI: add legacy IDE IRQ implementation</title>
<updated>2013-12-29T12:44:10+00:00</updated>
<author>
<name>Russell King</name>
<email>rmk+kernel@arm.linux.org.uk</email>
</author>
<published>2013-12-29T12:42:25+00:00</published>
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<id>urn:sha1:a472b09dd5bb00f7da3087f2a324eb963e8eaa9f</id>
<content type='text'>
The IDE code used to specify the IDE IRQs for chipsets operating in
legacy mode.  This appears to no longer work, and this information must
be provided by the arch.  Do so.  This partially fixes CY82C693 (and
probably others) on Footbridge platforms.

Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
</entry>
<entry>
<title>PCI: collapse pcibios_resource_to_bus</title>
<updated>2012-02-24T03:19:04+00:00</updated>
<author>
<name>Bjorn Helgaas</name>
<email>bhelgaas@google.com</email>
</author>
<published>2012-02-24T03:19:04+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=fb127cb9de791d62fb393d6e65fa9869bddd2460'/>
<id>urn:sha1:fb127cb9de791d62fb393d6e65fa9869bddd2460</id>
<content type='text'>
Everybody uses the generic pcibios_resource_to_bus() supplied by the core
now, so remove the ARCH_HAS_GENERIC_PCI_OFFSETS used during conversion.

Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
</content>
</entry>
<entry>
<title>arm/PCI: get rid of device resource fixups</title>
<updated>2012-02-24T03:19:01+00:00</updated>
<author>
<name>Bjorn Helgaas</name>
<email>bhelgaas@google.com</email>
</author>
<published>2012-02-24T03:19:01+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=9f786d033d025ab7d2c4d1b959aa81d935eb9e19'/>
<id>urn:sha1:9f786d033d025ab7d2c4d1b959aa81d935eb9e19</id>
<content type='text'>
Tell the PCI core about host bridge address translation so it can take
care of bus-to-resource conversion for us.

CC: Russell King &lt;linux@arm.linux.org.uk&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
</content>
</entry>
<entry>
<title>PCI: ARM: convert pcibios_set_master() to a non-inlined function</title>
<updated>2012-01-06T20:10:36+00:00</updated>
<author>
<name>Myron Stowe</name>
<email>mstowe@redhat.com</email>
</author>
<published>2011-10-28T21:47:42+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=168c8619fd825d80d1753bf298d0b6aa8d739623'/>
<id>urn:sha1:168c8619fd825d80d1753bf298d0b6aa8d739623</id>
<content type='text'>
This patch converts ARM's architecture-specific inlined
'pcibios_set_master()' routine to a non-inlined function.  This will
allow follow on patches to create a generic 'pcibios_set_master()'
function using the '__weak' attribute which can be used by all
architectures as a default which, if necessary, can then be over-
ridden by architecture-specific code.

Converting 'pci_bios_set_master()' to a non-inlined function will allow
ARM's 'pcibios_set_master()' implementation to remain architecture-
specific after the generic version is introduced and thus, not change
current behavior.

Note that ARM also has a non-inlined 'pcibios_set_master()' that is
used if CONFIG_PCI_HOST_ITE8152 is defined.  This patch does not
change any behavior here either.

No functional change.

Signed-off-by: Myron Stowe &lt;myron.stowe@redhat.com&gt;
Signed-off-by: Jesse Barnes &lt;jbarnes@virtuousgeek.org&gt;
</content>
</entry>
<entry>
<title>ARM: convert PCI defines to variables</title>
<updated>2011-07-12T16:19:29+00:00</updated>
<author>
<name>Rob Herring</name>
<email>rob.herring@calxeda.com</email>
</author>
<published>2011-06-29T02:16:13+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=c9d95fbe59e426eed7f16e7cac812e46ac4772d0'/>
<id>urn:sha1:c9d95fbe59e426eed7f16e7cac812e46ac4772d0</id>
<content type='text'>
Convert PCIBIOS_MIN_IO and PCIBIOS_MIN_MEM to variables to allow
multi-platform builds. This also removes the requirement for a platform to
have a mach/hardware.h.

The default values for i/o and mem are 0x1000 and 0x01000000, respectively.
Per Arnd Bergmann, other values are likely to be incorrect, but this commit
does not try to address that issue.

Signed-off-by: Rob Herring &lt;rob.herring@calxeda.com&gt;
Acked-by: Nicolas Pitre &lt;nicolas.pitre@linaro.org&gt;
Reviewed-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
</entry>
<entry>
<title>ARM: pci: make pcibios_assign_all_busses use pci_has_flag</title>
<updated>2011-07-12T16:19:28+00:00</updated>
<author>
<name>Rob Herring</name>
<email>rob.herring@calxeda.com</email>
</author>
<published>2011-06-29T15:59:45+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=dc8d966bccde0b8b6c9e8c6e663c747030c17435'/>
<id>urn:sha1:dc8d966bccde0b8b6c9e8c6e663c747030c17435</id>
<content type='text'>
Convert pcibios_assign_all_busses from a define to inline so platforms can
control this setting.

Signed-off-by: Rob Herring &lt;rob.herring@calxeda.com&gt;
Acked-by: Nicolas Pitre &lt;nicolas.pitre@linaro.org&gt;
Reviewed-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
</entry>
<entry>
<title>ARM: 6058/1: Add support for PCI domains</title>
<updated>2010-04-22T20:38:11+00:00</updated>
<author>
<name>Anton Vorontsov</name>
<email>cbouatmailru@gmail.com</email>
</author>
<published>2010-04-19T12:20:49+00:00</published>
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<id>urn:sha1:52882173cfed4fabcc1496755000bf022d681e52</id>
<content type='text'>
This patch adds support for PCI domains on ARM platforms.

Also, protect asm/mach/pci.h from multiple inclustions, otherwise
build fails because of pci_domain_nr() and pci_proc_domain()
redefinitions.

Signed-off-by: Anton Vorontsov &lt;avorontsov@mvista.com&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
</entry>
</feed>
