BMC/Intel-BMC/linux.git/arch/arm/common/edma.c, branch dev

ARM: common: edma: clear completion interrupts on stop

2015-05-06T20:27:01+00:00

When stopping a DMA transfer with interrupts disabled it is possible that the DMA transfer completes before the events are cleared. In this case the completion interrupt will be pending, causing a completion callback after the transfer was stopped. By clearing the completion interrupt for the stopping channel it is ensured that no completion event will be generated after the stop. Signed-off-by: John Ogness Acked-by: Peter Ujfalusi Signed-off-by: Greg Kroah-Hartman

Merge tag 'drivers-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

2014-12-09T22:48:22+00:00

Pull ARM SoC driver updates from Arnd Bergmann: "These are changes for drivers that are intimately tied to some SoC and for some reason could not get merged through the respective subsystem maintainer tree. The largest single change here this time around is the Tegra iommu/memory controller driver, which gets updated to the new iommu DT binding. More drivers like this are likely to follow for the following merge window, but we should be able to do those through the iommu maintainer. Other notable changes are: - reset controller drivers from the reset maintainer (socfpga, sti, berlin) - fixes for the keystone navigator driver merged last time - at91 rtc driver changes related to the at91 cleanups - ARM perf driver changes from Will Deacon - updates for the brcmstb_gisb driver" * tag 'drivers-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (53 commits) clocksource: arch_timer: Allow the device tree to specify uninitialized timer registers clocksource: arch_timer: Fix code to use physical timers when requested memory: Add NVIDIA Tegra memory controller support bus: brcmstb_gisb: Add register offset tables for older chips bus: brcmstb_gisb: Look up register offsets in a table bus: brcmstb_gisb: Introduce wrapper functions for MMIO accesses bus: brcmstb_gisb: Make the driver buildable on MIPS of: Add NVIDIA Tegra memory controller binding ARM: tegra: Move AHB Kconfig to drivers/amba amba: Add Kconfig file clk: tegra: Implement memory-controller clock serial: samsung: Fix serial config dependencies for exynos7 bus: brcmstb_gisb: resolve section mismatch ARM: common: edma: edma_pm_resume may be unused ARM: common: edma: add suspend resume hook powerpc/iommu: Rename iommu_[un]map_sg functions rtc: at91sam9: add DT bindings documentation rtc: at91sam9: use clk API instead of relying on AT91_SLOW_CLOCK ARM: at91: add clk_lookup entry for RTT devices rtc: at91sam9: rework the Kconfig description ...

ARM: common: edma: edma_pm_resume may be unused

2014-11-21T11:31:52+00:00

The recently introduced resume hook in the edma driver is not referenced when CONFIG_PM_SLEEP is not set, which results in a compile warning in keystone builds. This adds an appropriate #ifdef. Cc: Nishanth Menon Cc: Daniel Mack Cc: Joel Fernandes Acked-by: Sekhar Nori Fixes: a2b1175131: ("ARM: common: edma: add suspend resume hook") Signed-off-by: Arnd Bergmann

ARM: common: edma: add suspend resume hook

2014-11-18T15:56:02+00:00

This patch makes the edma driver resume correctly after suspend. Tested on an AM33xx platform with cyclic audio streams and omap_hsmmc. All information can be reconstructed by already known runtime information. As we now use some functions that were previously only used from __init context, annotations had to be dropped. [nm@ti.com: added error handling for runtime + suspend_late/early_resume] Signed-off-by: Nishanth Menon Signed-off-by: Daniel Mack Tested-by: Joel Fernandes Acked-by: Joel Fernandes [nsekhar@ti.com: remove unneeded pm_runtime_get_sync() from resume] Signed-off-by: Sekhar Nori

dma: edma: move device registration to platform code

2014-11-06T02:26:10+00:00

The horrible split between the low-level part of the edma support and the dmaengine front-end driver causes problems on multiplatform kernels. This is an attempt to improve the situation slightly by only registering the dmaengine devices that are actually present. Signed-off-by: Arnd Bergmann [olof: add missing include of linux/dma-mapping.h] Signed-off-by: Olof Johansson Signed-off-by: Olof Johansson

ARM: edma: Fix configuration parsing for SoCs with multiple eDMA3 CC

2014-08-26T09:19:15+00:00

The edma_setup_from_hw() should know about the CC number when parsing the CCCFG register - when it reads the register to be precise. The base addresses for CCs stored in an array and we need to provide the correct id to edma_read() in order to read the correct register. Cc: # 3.16 Signed-off-by: Peter Ujfalusi Signed-off-by: Sekhar Nori

ARM: edma: Add edma_assign_channel_eventq() to move channel to a give queue

2014-07-28T11:33:13+00:00

In some cases it is desired to move a channel to a specific event queue. Such a use case is audio, where it is preferred that it is served with highest priority compared to other DMA clients. Signed-off-by: Peter Ujfalusi Acked-by: Sekhar Nori Signed-off-by: Vinod Koul

ARM: edma: Set default queue to lowest priority

2014-07-28T11:33:09+00:00

Use the lowest priority queue as default for clients. Signed-off-by: Peter Ujfalusi Acked-by: Sekhar Nori Signed-off-by: Vinod Koul

Merge tag 'davinci-for-v3.16/edma' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/drivers

2014-05-26T21:59:05+00:00

Merge "DaVinci EDMA clean-up for v3.16" from Sekhar Nori: This series makes edma use configuration information available within the IP instead of reading it from platform data or DT. Some other useful clean-ups are included too. * tag 'davinci-for-v3.16/edma' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci: (34 commits) ARM: edma: Remove redundant/unused parameters from edma_soc_info ARM: davinci: Remove redundant/unused parameters for edma ARM: dts: am4372: Remove obsolete properties from edma node ARM: dts: am33xx: Remove obsolete properties from edma node dt/bindings: ti,edma: Remove redundant properties from documentation ARM: edma: Get IP configuration from HW (number of channels, tc, etc) ARM: edma: Save number of regions from pdata to struct edma ARM: edma: Remove num_cc member from struct edma ARM: edma: Remove queue_tc_mapping data from edma_soc_info ARM: davinci: Remove eDMA3 queue_tc_mapping data from edma_soc_info ARM: edma: Do not change TC -> Queue mapping, leave it to default. ARM: edma: Take the number of tc from edma_soc_info (pdata) ARM: edma: No need to clean the pdata in edma_of_parse_dt() ARM: edma: Clean up and simplify the code around irq request dmaengine: edma: update DMA memcpy to use new param element dmaengine: edma: Document variables used for residue accounting dmaengine: edma: Provide granular accounting dmaengine: edma: Make reading the position of active channels work dmaengine: edma: Store transfer data in edma_desc and edma_pset dmaengine: edma: Create private pset struct ... Signed-off-by: Olof Johansson

ARM: edma: Get IP configuration from HW (number of channels, tc, etc)

2014-05-22T09:25:07+00:00

From CCCFG register of eDMA3 we can get all the needed information for the driver about the IP: Number of channels: NUM_DMACH Number of regions: NUM_REGN Number of slots (PaRAM sets): NUM_PAENTRY Number of TC/EQ: NUM_EVQUE In case when booted with DT or the queue_priority_mapping is not provided set up a default priority map. Signed-off-by: Peter Ujfalusi Acked-by: Joel Fernandes Signed-off-by: Sekhar Nori