BMC/Intel-BMC/linux.git/arch/arm/boot, branch dev-4.3Intel OpenBMC Linux kernel source tree (mirror)https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev-4.32016-02-11T03:00:43+00:00arm: dts: unit address should not have 0x prefix2016-02-11T03:00:43+00:00Milton D. Miller IImiltonm@us.ibm.com2016-02-11T01:30:28+00:00urn:sha1:856ffde999e6366536cc14436fdec4455d05b8db
The implied format for most bus bindings implies the uname-address
part of the unit-name should be in hex without a leading 0x.
Fix the one i2c bus that did not follow this convention.
Signed-off-by: Milton Miller <miltonm@us.ibm.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
arm/dts/barreleye: Fix polarity and names of LEDs2016-02-10T03:23:49+00:00Norman Jamesnjames@us.ibm.com2016-02-05T00:42:01+00:00urn:sha1:4b61633e9e65f16b0c1d9d95f585f5f879a5666c
Makes names consistent with schematic.
Signed-off-by: Norman James <nkskjames@gmail.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
arm/aspeed: Enable VUART driver2016-01-30T00:34:20+00:00Jeremy Kerrjk@ozlabs.org2016-01-29T04:55:48+00:00urn:sha1:36693bcc928980d718f53aa9d95a840a5da7d5fa
This change makes use of the new VUART device driver. We need a separate
compatible property for the VUART node, and a fix for the interrupt
definitions. We also change the SCU setup to notify host firmware that the
VUART is available.
Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
hwmon: Add Power8 OCC hwmon driver2016-01-27T06:39:32+00:00Yi Liadamliyi@msn.com2016-01-05T04:10:13+00:00urn:sha1:fe68a785afbaa305506c87c6324f70ed0605385c
Adds a hwmon driver for BMC to monitor Power8 CPU sensors via On Chip
Controller.
Signed-off-by: Yi Li <adamliyi@msn.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
aspeed: update bmc dts with attached flash2016-01-27T03:13:53+00:00Milton D. Miller IImiltonm@us.ibm.com2016-01-22T02:25:51+00:00urn:sha1:6e214454d3ef067354e3587040483e115766446b
Add the attached spi flash chips attached to the static memory
controller and the SPI memory controller. The partitions and label
for the SMC attached flash are included in a separate file for import
from other build systems.
Signed-off-by: Milton Miller <miltonm@us.ibm.com>
Add HDD backplane and SAS expander VPD EEPROMS to device tree2016-01-20T03:12:18+00:00Norman Jamesnjames@us.ibm.com2016-01-18T20:27:14+00:00urn:sha1:5947c972e30939fcd3f462d3a103ce9b63e1f08a
Signed-off-by: Norman James <nkskjames@gmail.com>
disable internal RTC2016-01-13T17:54:53+00:00Norman Jamesnjames@us.ibm.com2016-01-13T17:54:53+00:00urn:sha1:ed679da11afafa2607bbb45c6f24f7b3d03a9bacMerge tag 'v4.3.3' into dev-4.32015-12-16T22:56:14+00:00Joel Stanleyjoel@jms.id.au2015-12-16T22:56:14+00:00urn:sha1:4b62e603522294dfc278ad42ee5cbf9d2f4717cb
This is the 4.3.3 stable release
barreleye: Add gpio LEDs to device tree2015-12-15T21:25:32+00:00Jeremy Kerrjk@ozlabs.org2015-12-15T19:26:51+00:00urn:sha1:7663dc55007b07bbf3fc363ee294f7318417f0ec
This change exposes the LEDs (which are connected to GPIOs) on
barreleye and palmetto machines as led-class devices. This allows
us to use the full trigger support.
Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
aspeed: correct sram address in ast2400.dtsi2015-12-10T03:00:31+00:00Milton D. Miller IImiltonm@us.ibm.com2015-12-03T18:04:34+00:00urn:sha1:9a1fd0abba1bea80ca8ef5c0cb4309d063f4fdc0
The sram reg and name properties were missing a zero. It was more
obvious when looking at the platform device names which put the address
before the generic name.
Signed-off-by: Milton Miller <miltonm@us.ibm.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>