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<title>BMC/Intel-BMC/linux.git/arch/arm/boot/dts, branch dev</title>
<subtitle>Intel OpenBMC Linux kernel source tree (mirror)</subtitle>
<id>https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev</id>
<link rel='self' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev'/>
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<updated>2015-11-04T01:09:04+00:00</updated>
<entry>
<title>arch/arm/boot/dts/ast2400: Add #address- &amp; #size-cells properties to i2c</title>
<updated>2015-11-04T01:09:04+00:00</updated>
<author>
<name>Jeremy Kerr</name>
<email>jk@ozlabs.org</email>
</author>
<published>2015-11-04T01:09:04+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=6e761f7ca35ed766e3994bee4512a5c2d0e7c5bb'/>
<id>urn:sha1:6e761f7ca35ed766e3994bee4512a5c2d0e7c5bb</id>
<content type='text'>
We geta bunch of warnings at the moment.

Signed-off-by: Jeremy Kerr &lt;jk@ozlabs.org&gt;
</content>
</entry>
<entry>
<title>arch/arm/boot/dts: Use a common dtsi file for aspeed devices</title>
<updated>2015-11-04T00:45:36+00:00</updated>
<author>
<name>Jeremy Kerr</name>
<email>jk@ozlabs.org</email>
</author>
<published>2015-11-04T00:41:48+00:00</published>
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<id>urn:sha1:49f35c3ad122b3b61798e9d420297ca0ceac9b5b</id>
<content type='text'>
the dts files for palmetto and barreleye are mostly the same; use a dtsi
file for the common chip parts, keeping only the board-specific things
in the per-platform files.

Signed-off-by: Jeremy Kerr &lt;jk@ozlabs.org&gt;
</content>
</entry>
<entry>
<title>arm/dts/aspeed: Added i2c busses and devices</title>
<updated>2015-11-01T23:22:00+00:00</updated>
<author>
<name>Norman James</name>
<email>njames@us.ibm.com</email>
</author>
<published>2015-10-30T14:50:30+00:00</published>
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<id>urn:sha1:81f2750a7d14a1ea9b1163e705dba0b08e0173b7</id>
<content type='text'>
Signed-off-by: Joel Stanley &lt;joel@jms.id.au&gt;
</content>
</entry>
<entry>
<title>aspeed/i2c: add all buses to device tree</title>
<updated>2015-10-30T06:09:16+00:00</updated>
<author>
<name>Joel Stanley</name>
<email>joel@jms.id.au</email>
</author>
<published>2015-10-30T06:05:05+00:00</published>
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<id>urn:sha1:d75c25dae1671f55f8a0356be0f5bb9aa8df5dc2</id>
<content type='text'>
They will only be enabled if the status property is changed from
"disabled".

Signed-off-by: Joel Stanley &lt;joel@jms.id.au&gt;
</content>
</entry>
<entry>
<title>aspeed/i2c: Add working driver for multiple buses</title>
<updated>2015-10-30T05:32:03+00:00</updated>
<author>
<name>Joel Stanley</name>
<email>joel@jms.id.au</email>
</author>
<published>2015-10-30T05:32:03+00:00</published>
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<id>urn:sha1:5a9be1dd481d48462bc9dd793fcf349c639f01bf</id>
<content type='text'>
We do not support DMA, and have not tested any slave support, however
master mode byte-at-a-time is working.

The device tree currently includes the first and second buses.

Signed-off-by: Joel Stanley &lt;joel@jms.id.au&gt;
</content>
</entry>
<entry>
<title>gpio/aspeed: Implement interrupts for GPIO banks</title>
<updated>2015-10-27T07:26:13+00:00</updated>
<author>
<name>Jeremy Kerr</name>
<email>jk@ozlabs.org</email>
</author>
<published>2015-10-26T06:49:44+00:00</published>
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<id>urn:sha1:1549a79bc19e77975ad104dc16da8fa14d0161de</id>
<content type='text'>
We have a set of interrupt registers in each bank; this change
adds a gpio irqchip to hook them up to the GPIO code.

Signed-off-by: Jeremy Kerr &lt;jk@ozlabs.org&gt;
</content>
</entry>
<entry>
<title>gpio/aspeed: Expose entire bank as one gpio chip</title>
<updated>2015-10-27T07:15:50+00:00</updated>
<author>
<name>Jeremy Kerr</name>
<email>jk@ozlabs.org</email>
</author>
<published>2015-10-23T06:31:53+00:00</published>
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<id>urn:sha1:302fccccca9d5e1338925c99c8e52107e5f204ae</id>
<content type='text'>
Signed-off-by: Jeremy Kerr &lt;jk@ozlabs.org&gt;
</content>
</entry>
<entry>
<title>arm/dts/aspeeed: Fix unit address for ibt</title>
<updated>2015-10-23T04:31:49+00:00</updated>
<author>
<name>Jeremy Kerr</name>
<email>jk@ozlabs.org</email>
</author>
<published>2015-10-21T03:46:32+00:00</published>
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<id>urn:sha1:f88e5c6f0d77c9c9dd9fb57391842ca3b2579deb</id>
<content type='text'>
Signed-off-by: Jeremy Kerr &lt;jk@ozlabs.org&gt;
</content>
</entry>
<entry>
<title>misc/bt-host: use a more explicit compatible string</title>
<updated>2015-10-23T04:31:49+00:00</updated>
<author>
<name>Jeremy Kerr</name>
<email>jk@ozlabs.org</email>
</author>
<published>2015-10-21T03:46:00+00:00</published>
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<id>urn:sha1:755f444549e618b3ba841159cbf974522c8bbe17</id>
<content type='text'>
The interface we're using here is specific to the aspeed
hardware implementation.

Signed-off-by: Jeremy Kerr &lt;jk@ozlabs.org&gt;
</content>
</entry>
<entry>
<title>dts: update device tree for ncsi support</title>
<updated>2015-10-06T04:16:58+00:00</updated>
<author>
<name>Joel Stanley</name>
<email>joel@jms.id.au</email>
</author>
<published>2015-10-06T04:15:25+00:00</published>
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<id>urn:sha1:9f2a34f2489d9ab846ec278106bc0a9ff2a799fe</id>
<content type='text'>
Signed-off-by: Joel Stanley &lt;joel@jms.id.au&gt;
</content>
</entry>
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