Intel OpenBMC Linux kernel source tree (mirror) https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev 2015-09-14T11:45:25+00:00 2015-09-14T11:45:25+00:00 Benjamin Herrenschmidt benh@kernel.crashing.org 2015-04-14T05:43:46+00:00 urn:sha1:8f93ca5e44a978a2f6c8306922ad581944146948 2015-07-07T11:35:33+00:00 Russell King rmk+kernel@arm.linux.org.uk 2015-07-07T11:35:33+00:00 urn:sha1:06be5eefe1192eb8ce8d07497f67595b6bfe9741 2015-06-29T13:33:14+00:00 Russell King rmk+kernel@arm.linux.org.uk 2015-06-25T09:49:45+00:00 urn:sha1:b4d103d1a45fed0da2f31c905eb5e053c84a41c6 Add some help text for the HIGHPTE configuration entry. This comes from the x86 entry, but reworded to be more a more accurate description of what this option does. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> 2015-06-26T19:20:00+00:00 Linus Torvalds torvalds@linux-foundation.org 2015-06-26T19:20:00+00:00 urn:sha1:e8a0b37d28ace440776c0a4fe3c65f5832a9a7ee Pull ARM updates from Russell King: "Bigger items included in this update are: - A series of updates from Arnd for ARM randconfig build failures - Updates from Dmitry for StrongARM SA-1100 to move IRQ handling to drivers/irqchip/ - Move ARMs SP804 timer to drivers/clocksource/ - Perf updates from Mark Rutland in preparation to move the ARM perf code into drivers/ so it can be shared with ARM64. - MCPM updates from Nicolas - Add support for taking platform serial number from DT - Re-implement Keystone2 physical address space switch to conform to architecture requirements - Clean up ARMv7 LPAE code, which goes in hand with the Keystone2 changes. - L2C cleanups to avoid unlocking caches if we're prevented by the secure support to unlock. - Avoid cleaning a potentially dirty cache containing stale data on CPU initialisation - Add ARM-only entry point for secondary startup (for machines that can only call into a Thumb kernel in ARM mode). Same thing is also done for the resume entry point. - Provide arch_irqs_disabled via asm-generic - Enlarge ARMv7M vector table - Always use BFD linker for VDSO, as gold doesn't accept some of the options we need. - Fix an incorrect BSYM (for Thumb symbols) usage, and convert all BSYM compiler macros to a "badr" (for branch address). - Shut up compiler warnings provoked by our cmpxchg() implementation. - Ensure bad xchg sizes fail to link" * 'for-linus' of git://ftp.arm.linux.org.uk/~rmk/linux-arm: (75 commits) ARM: Fix build if CLKDEV_LOOKUP is not configured ARM: fix new BSYM() usage introduced via for-arm-soc branch ARM: 8383/1: nommu: avoid deprecated source register on mov ARM: 8391/1: l2c: add options to overwrite prefetching behavior ARM: 8390/1: irqflags: Get arch_irqs_disabled from asm-generic ARM: 8387/1: arm/mm/dma-mapping.c: Add arm_coherent_dma_mmap ARM: 8388/1: tcm: Don't crash when TCM banks are protected by TrustZone ARM: 8384/1: VDSO: force use of BFD linker ARM: 8385/1: VDSO: group link options ARM: cmpxchg: avoid warnings from macro-ized cmpxchg() implementations ARM: remove __bad_xchg definition ARM: 8369/1: ARMv7M: define size of vector table for Vybrid ARM: 8382/1: clocksource: make ARM_TIMER_SP804 depend on GENERIC_SCHED_CLOCK ARM: 8366/1: move Dual-Timer SP804 driver to drivers/clocksource ARM: 8365/1: introduce sp804_timer_disable and remove arm_timer.h inclusion ARM: 8364/1: fix BE32 module loading ARM: 8360/1: add secondary_startup_arm prototype in header file ARM: 8359/1: correct secondary_startup_arm mode ARM: proc-v7: sanitise and document registers around errata ARM: proc-v7: clean up MIDR access ... 2015-06-26T18:34:35+00:00 Linus Torvalds torvalds@linux-foundation.org 2015-06-26T18:34:35+00:00 urn:sha1:4aa705b18bf17c4ff33ff7bbcd3f0c596443fa81 Pull ARM SoC platform support updates from Kevin Hilman: "Our SoC branch usually contains expanded support for new SoCs and other core platform code. Some highlights from this round: - sunxi: SMP support for A23 SoC - socpga: big-endian support - pxa: conversion to common clock framework - bcm: SMP support for BCM63138 - imx: support new I.MX7D SoC - zte: basic support for ZX296702 SoC" * tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (134 commits) ARM: zx: Add basic defconfig support for ZX296702 ARM: dts: zx: add an initial zx296702 dts and doc clk: zx: add clock support to zx296702 dt-bindings: Add #defines for ZTE ZX296702 clocks ARM: socfpga: fix build error due to secondary_startup MAINTAINERS: ARM64: EXYNOS: Extend entry for ARM64 DTS ARM: ep93xx: simone: support for SPI-based MMC/SD cards MAINTAINERS: update Shawn's email to use kernel.org one ARM: socfpga: support suspend to ram ARM: socfpga: add CPU_METHOD_OF_DECLARE for Arria 10 ARM: socfpga: use CPU_METHOD_OF_DECLARE for socfpga_cyclone5 ARM: EXYNOS: register power domain driver from core_initcall ARM: EXYNOS: use PS_HOLD based poweroff for all supported SoCs ARM: SAMSUNG: Constify platform_device_id ARM: EXYNOS: Constify irq_domain_ops ARM: EXYNOS: add coupled cpuidle support for Exynos3250 ARM: EXYNOS: add exynos_get_boot_addr() helper ARM: EXYNOS: add exynos_set_boot_addr() helper ARM: EXYNOS: make exynos_core_restart() less verbose ARM: EXYNOS: fix exynos_boot_secondary() return value on timeout ... 2015-06-12T20:18:08+00:00 Russell King rmk+kernel@arm.linux.org.uk 2015-06-12T20:18:08+00:00 urn:sha1:9de44aa4dc969e4a46c2bfbd33d65bfa6ad2a15d 2015-06-02T08:58:18+00:00 Sudeep Holla sudeep.holla@arm.com 2015-05-18T15:29:40+00:00 urn:sha1:0b7402dce445ba0d11401c2cb806e8fc260c9e49 The ARM Dual-Timer SP804 module is peripheral found not only on ARM32 platforms but also on ARM64 platforms. This patch moves the driver out of arch/arm to driver/clocksource so that it can be used on ARM64 platforms also. Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Rob Herring <robh@kernel.org> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Olof Johansson <olof@lixom.net> Acked-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> 2015-06-01T15:56:23+00:00 Maxime Coquelin mcoquelin.stm32@gmail.com 2015-05-22T21:50:52+00:00 urn:sha1:2526318638589ec26804f935cf38a7fa1d43cdeb STM32 clocksource driver needs to be selected if ARCH_STM32. Signed-off-by: Maxime Coquelin <mcoquelin.stm32@gmail.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de> 2015-06-01T15:54:31+00:00 Arnd Bergmann arnd@arndb.de 2015-06-01T15:54:31+00:00 urn:sha1:c9531b4f1535f88fd82e45d1ffbfa61dbee26fb6 Merge "changes for Broadcom SoCs": - Dan fixes an error path in the BCM63xx SMP code - Ray adds the relevant Kconfig selects to enable the Broadcom NAND driver on Cygnus - Kevin provides a change to the Broadcom GISB arbiter driver to make it work with MIPS-based big-endian STB SoCs (this was a long-standing change that had dependencies on code in drivers/of/*) - Gregory enables the use of GPIOLIB for brcmstb SoCs and bumps the number of GPIOs for these platforms * tag 'arm-soc/for-4.2/soc-part2' of http://github.com/broadcom/stblinux: ARM: brcmstb: Add default gpio number ARM: brcmstb: Select ARCH_WANT_OPTIONAL_GPIOLIB bus: brcmstb_gisb: Honor the "big-endian" and "native-endian" DT properties ARM: BCM: Enable NAND support for iProc SoCs ARM: BCM63xx: fix an error path in bcm63xx_pmb_power_on_cpu() 2015-05-29T21:43:13+00:00 Gregory Fong gregory.0xf0@gmail.com 2015-05-29T02:14:10+00:00 urn:sha1:b35d2e561ea711626749fcb511637f0e4604ff18 Out of the brcmstb SoCs that I know, BCM3390 has the largest numbers of GPIOs, with its - 320 "peripheral" GPIOs - 5*32 = 160 UPG GPIOs (counting unused lines, which do get counted) - 2*32 = 64 UPG AON GPIOs (counting unused lines) Total: 544 I suspect that the upper limit will only need to be higher in the future, so set it to 1024. Signed-off-by: Gregory Fong <gregory.0xf0@gmail.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>