<feed xmlns='http://www.w3.org/2005/Atom'>
<title>BMC/Intel-BMC/linux.git/arch/arc/include/asm/irq.h, branch dev</title>
<subtitle>Intel OpenBMC Linux kernel source tree (mirror)</subtitle>
<id>https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev</id>
<link rel='self' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/'/>
<updated>2015-06-22T08:36:56+00:00</updated>
<entry>
<title>ARCv2: SMP: Support ARConnect (MCIP) for Inter-Core-Interrupts et al</title>
<updated>2015-06-22T08:36:56+00:00</updated>
<author>
<name>Vineet Gupta</name>
<email>vgupta@synopsys.com</email>
</author>
<published>2014-09-10T13:35:38+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=82fea5a1bbbe8c3b56d5f3efbf8880c7b25b1758'/>
<id>urn:sha1:82fea5a1bbbe8c3b56d5f3efbf8880c7b25b1758</id>
<content type='text'>
Cc: Jason Cooper &lt;jason@lakedaemon.net&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
</content>
</entry>
<entry>
<title>ARCv2: Support for ARCv2 ISA and HS38x cores</title>
<updated>2015-06-22T08:36:55+00:00</updated>
<author>
<name>Vineet Gupta</name>
<email>vgupta@synopsys.com</email>
</author>
<published>2013-05-13T13:00:41+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=1f6ccfff6314672743ad7252160654709e997a2a'/>
<id>urn:sha1:1f6ccfff6314672743ad7252160654709e997a2a</id>
<content type='text'>
The notable features are:
    - SMP configurations of upto 4 cores with coherency
    - Optional L2 Cache and IO-Coherency
    - Revised Interrupt Architecture (multiple priorites, reg banks,
        auto stack switch, auto regfile save/restore)
    - MMUv4 (PIPT dcache, Huge Pages)
    - Instructions for
	* 64bit load/store: LDD, STD
	* Hardware assisted divide/remainder: DIV, REM
	* Function prologue/epilogue: ENTER_S, LEAVE_S
	* IRQ enable/disable: CLRI, SETI
	* pop count: FFS, FLS
	* SETcc, BMSKN, XBFU...

Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
</content>
</entry>
<entry>
<title>ARC: [SMP] unify cpu private IRQ requests (TIMER/IPI)</title>
<updated>2014-07-23T05:46:45+00:00</updated>
<author>
<name>Vineet Gupta</name>
<email>vgupta@synopsys.com</email>
</author>
<published>2014-05-07T09:55:10+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=2b75c0f93e395aa6130c20a08016b143e6ec8c53'/>
<id>urn:sha1:2b75c0f93e395aa6130c20a08016b143e6ec8c53</id>
<content type='text'>
The current cpu-private IRQ registration is ugly as it requires need to
expose arch_unmask_irq() outside of intc code.
So switch to percpu IRQ APIs:
  -request_percpu_irq [boot core]
  -enable_percpu_irq  [all cores]

Encapsulated in helper arc_request_percpu_irq()

Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
</content>
</entry>
<entry>
<title>ARC: arc_local_timer_setup() need not pass own cpu id</title>
<updated>2014-06-03T07:56:52+00:00</updated>
<author>
<name>Vineet Gupta</name>
<email>vgupta@synopsys.com</email>
</author>
<published>2014-05-08T08:36:38+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=2d4899f6bddfbeb88c01f2ec28f977e0d8c8d369'/>
<id>urn:sha1:2d4899f6bddfbeb88c01f2ec28f977e0d8c8d369</id>
<content type='text'>
Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
</content>
</entry>
<entry>
<title>ARC: [SMP] ISS SMP extension bitrot</title>
<updated>2014-05-05T08:52:12+00:00</updated>
<author>
<name>Vineet Gupta</name>
<email>vgupta@synopsys.com</email>
</author>
<published>2014-02-28T08:13:44+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=9a091d9e8450a4cec76bd208bbbb017a12795416'/>
<id>urn:sha1:9a091d9e8450a4cec76bd208bbbb017a12795416</id>
<content type='text'>
* Move extension specific code out of common SMP code
* Don't enable it by default for SMP

Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
</content>
</entry>
<entry>
<title>arc: remove '__init' for get_hw_config_num_irq()</title>
<updated>2013-11-06T05:11:43+00:00</updated>
<author>
<name>Chen Gang</name>
<email>gang.chen@asianux.com</email>
</author>
<published>2013-10-23T03:02:51+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=4782f7f9aeba4dfd383c532e96bebf83ce0b9748'/>
<id>urn:sha1:4782f7f9aeba4dfd383c532e96bebf83ce0b9748</id>
<content type='text'>
get_hw_config_num_irq() may be called by normal iss_model_init_smp()
which is a function pointer for 'init_smp' which may be called by
first_lines_of_secondary() which also need be normal too.

The related warning (with allmodconfig):

    MODPOST vmlinux.o
  WARNING: vmlinux.o(.text+0x5814): Section mismatch in reference from the function iss_model_init_smp() to the function .init.text:get_hw_config_num_irq()
  The function iss_model_init_smp() references
  the function __init get_hw_config_num_irq().
  This is often because iss_model_init_smp lacks a __init
  annotation or the annotation of get_hw_config_num_irq is wrong.

Signed-off-by: Chen Gang &lt;gang.chen@asianux.com&gt;
</content>
</entry>
<entry>
<title>arc: remove '__init' for setup_processor() and arc_init_IRQ()</title>
<updated>2013-11-06T05:11:42+00:00</updated>
<author>
<name>Chen Gang</name>
<email>gang.chen@asianux.com</email>
</author>
<published>2013-10-23T02:12:05+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=ef3a661af69046df74beb0ddfa27204aad316385'/>
<id>urn:sha1:ef3a661af69046df74beb0ddfa27204aad316385</id>
<content type='text'>
They haven't '__init' in definition, but has '__init' in declaration.
And normal function start_kernel_secondary() may call setup_processor()
which will call arc_init_IRQ().

So need remove '__init' for both of them. The related warning (with
allmodconfig):

    MODPOST vmlinux.o
  WARNING: vmlinux.o(.text+0x3084): Section mismatch in reference from the function start_kernel_secondary() to the function .init.text:setup_processor()
  The function start_kernel_secondary() references
  the function __init setup_processor().
  This is often because start_kernel_secondary lacks a __init
  annotation or the annotation of setup_processor is wrong.

Signed-off-by: Chen Gang &lt;gang.chen@asianux.com&gt;
</content>
</entry>
<entry>
<title>arc: delete __cpuinit usage from all arc files</title>
<updated>2013-06-27T09:07:58+00:00</updated>
<author>
<name>Paul Gortmaker</name>
<email>paul.gortmaker@windriver.com</email>
</author>
<published>2013-06-24T19:30:15+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=ce7599567e27eabc1003e35b6f05579268dafecd'/>
<id>urn:sha1:ce7599567e27eabc1003e35b6f05579268dafecd</id>
<content type='text'>
The __cpuinit type of throwaway sections might have made sense
some time ago when RAM was more constrained, but now the savings
do not offset the cost and complications.  For example, the fix in
commit 5e427ec2d0 ("x86: Fix bit corruption at CPU resume time")
is a good example of the nasty type of bugs that can be created
with improper use of the various __init prefixes.

After a discussion on LKML[1] it was decided that cpuinit should go
the way of devinit and be phased out.  Once all the users are gone,
we can then finally remove the macros themselves from linux/init.h.

Note that some harmless section mismatch warnings may result, since
notify_cpu_starting() and cpu_up() are arch independent (kernel/cpu.c)
are flagged as __cpuinit  -- so if we remove the __cpuinit from
arch specific callers, we will also get section mismatch warnings.
As an intermediate step, we intend to turn the linux/init.h cpuinit
content into no-ops as early as possible, since that will get rid
of these warnings.  In any case, they are temporary and harmless.

This removes all the arch/arc uses of the __cpuinit macros from
all C files.  Currently arc does not have any __CPUINIT used in
assembly files.

[1] https://lkml.org/lkml/2013/5/20/589

Cc: Vineet Gupta &lt;vgupta@synopsys.com&gt;
Signed-off-by: Paul Gortmaker &lt;paul.gortmaker@windriver.com&gt;
Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
</content>
</entry>
<entry>
<title>ARC: Prepare interrupt code for external controllers</title>
<updated>2013-05-07T08:13:58+00:00</updated>
<author>
<name>Christian Ruppert</name>
<email>christian.ruppert@abilis.com</email>
</author>
<published>2013-04-11T13:19:39+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=a37cdacc9bc339097a2c206aad449ca307d7fd63'/>
<id>urn:sha1:a37cdacc9bc339097a2c206aad449ca307d7fd63</id>
<content type='text'>
This patch adds some room for CPU-external interrupt controllers in the
Linux interrupt space. Until now, only the 32 CPU internal interrupt lines
were supported which does not allow for external interrupt controllers such
as GPIO modules etc.

Signed-off-by: Christian Ruppert &lt;christian.ruppert@abilis.com&gt;
Signed-off-by: Pierrick Hascoet &lt;pierrick.hascoet@abilis.com&gt;
Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
</content>
</entry>
<entry>
<title>ARC: [Review] Multi-platform image #5: NR_IRQS defined by ARC core</title>
<updated>2013-02-15T17:46:15+00:00</updated>
<author>
<name>Vineet Gupta</name>
<email>vgupta@synopsys.com</email>
</author>
<published>2013-01-18T09:42:26+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=decae9d3e87b5454b3b190d8e00b063175a3a091'/>
<id>urn:sha1:decae9d3e87b5454b3b190d8e00b063175a3a091</id>
<content type='text'>
For now this will suffice for all platforms, later exotic ones needs to
get this from DeviceTree

Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
Cc: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
</entry>
</feed>
