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<title>BMC/Intel-BMC/linux.git/Documentation, branch dev-4.6</title>
<subtitle>Intel OpenBMC Linux kernel source tree (mirror)</subtitle>
<id>https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev-4.6</id>
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<updated>2016-06-08T19:34:29+00:00</updated>
<entry>
<title>Merge tag 'v4.6.2' into dev-4.6</title>
<updated>2016-06-08T19:34:29+00:00</updated>
<author>
<name>Joel Stanley</name>
<email>joel@jms.id.au</email>
</author>
<published>2016-06-08T19:34:29+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=cd8f876ccf2f53282b100fd11ed339e7c495d936'/>
<id>urn:sha1:cd8f876ccf2f53282b100fd11ed339e7c495d936</id>
<content type='text'>
This is the 4.6.2 stable release

Signed-off-by: Joel Stanley &lt;joel@jms.id.au&gt;
</content>
</entry>
<entry>
<title>drm: Add helper for DP++ adaptors</title>
<updated>2016-06-08T01:23:41+00:00</updated>
<author>
<name>Ville Syrjälä</name>
<email>ville.syrjala@linux.intel.com</email>
</author>
<published>2016-05-06T13:46:52+00:00</published>
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<id>urn:sha1:60ae20cc590e546cd23225adbed3ac258c1b3770</id>
<content type='text'>
commit b3daa5ef52c26acd7432c787989bd92d48070c76 upstream.

Add a helper which aids in the identification of DP dual mode
(aka. DP++) adaptors. There are several types of adaptors
specified: type 1 DVI, type 1 HDMI, type 2 DVI, type 2 HDMI

Type 1 adaptors have a max TMDS clock limit of 165MHz, type 2 adaptors
may go as high as 300MHz and they provide a register informing the
source device what the actual limit is. Supposedly also type 1 adaptors
may optionally implement this register. This TMDS clock limit is the
main reason why we need to identify these adaptors.

Type 1 adaptors provide access to their internal registers and the sink
DDC bus through I2C. Type 2 adaptors provide this access both via I2C
and I2C-over-AUX. A type 2 source device may choose to implement either
of these methods. If a source device implements the I2C-over-AUX
method, then the driver will obviously need specific support for such
adaptors since the port is driven like an HDMI port, but DDC
communication happes over the AUX channel.

This helper should be enough to identify the adaptor type (some
type 1 DVI adaptors may be a slight exception) and the maximum TMDS
clock limit. Another feature that may be available is control over
the TMDS output buffers on the adaptor, possibly allowing for some
power saving when the TMDS link is down.

Other user controllable features that may be available in the adaptors
are downstream i2c bus speed control when using i2c-over-aux, and
some control over the CEC pin. I chose not to provide any helper
functions for those since I have no use for them in i915 at this time.
The rest of the registers in the adaptor are mostly just information,
eg. IEEE OUI, hardware and firmware revision, etc.

v2: Pass adaptor type to helper functions to ease driver implementation
    Fix a bunch of typoes (Paulo)
    Add DRM_DP_DUAL_MODE_UNKNOWN for the case where we don't (yet) know
    the type (Paulo)
    Reject 0x00 and 0xff DP_DUAL_MODE_MAX_TMDS_CLOCK values (Paulo)
    Adjust drm_dp_dual_mode_detect() type2 vs. type1 detection to
    ease future LSPCON enabling
    Remove the unused DP_DUAL_MODE_LAST_RESERVED define
v3: Fix kernel doc function argument descriptions (Jani)
    s/NONE/UNKNOWN/ in drm_dp_dual_mode_detect() docs
    Add kernel doc for enum drm_dp_dual_mode_type
    Actually build the docs
    Fix more typoes
v4: Adjust code indentation of type2 adaptor detection (Shashank)
    Add debug messages for failurs cases (Shashank)
v5: EXPORT_SYMBOL(drm_dp_dual_mode_read) (Paulo)

Cc: Tore Anderson &lt;tore@fud.no&gt;
Cc: Paulo Zanoni &lt;paulo.r.zanoni@intel.com&gt;
Cc: Shashank Sharma &lt;shashank.sharma@intel.com&gt;
Cc: Daniel Vetter &lt;daniel.vetter@ffwll.ch&gt;
Cc: Shashank Sharma &lt;shashank.sharma@intel.com&gt;
Signed-off-by: Ville Syrjälä &lt;ville.syrjala@linux.intel.com&gt;
Reviewed-by: Shashank Sharma &lt;shashank.sharma@intel.com&gt; (v4)
Link: http://patchwork.freedesktop.org/patch/msgid/1462542412-25533-1-git-send-email-ville.syrjala@linux.intel.com
(cherry picked from commit ede53344dbfd1dd43bfd73eb6af743d37c56a7c3)
Signed-off-by: Jani Nikula &lt;jani.nikula@intel.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>ARM: dts: imx35: restore existing used clock enumeration</title>
<updated>2016-06-08T01:23:35+00:00</updated>
<author>
<name>Alexander Kurz</name>
<email>akurz@blala.de</email>
</author>
<published>2016-04-14T21:30:49+00:00</published>
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<id>urn:sha1:a51c3d995f741a59994063d9d94f214216a8b9d4</id>
<content type='text'>
commit 3397c2c45b1b6f54834dfeae30a73046f33ca943 upstream.

A new element got inserted into enum mx35_clks with commit 3713e3f5e927
("clk: imx35: define two clocks for rtc"). This insertion shifted most
nummerical clock assignments to a new nummerical value which in turn
rendered most hardcoded nummeric values in imx35.dtsi incorrect.

Restore the existing order by moving the newly introduced clock to the
end of the enum. Update the dts documentation accordingly.

Signed-off-by: Alexander Kurz &lt;akurz@blala.de&gt;
Fixes: 3713e3f5e927 ("clk: imx35: define two clocks for rtc")
Signed-off-by: Shawn Guo &lt;shawnguo@kernel.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>hwmon/adm1275: Support sense resistor parameter from dt</title>
<updated>2016-06-03T20:51:52+00:00</updated>
<author>
<name>Joel Stanley</name>
<email>joel@jms.id.au</email>
</author>
<published>2016-03-21T11:01:08+00:00</published>
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<id>urn:sha1:26d1bf13a3f1866e2d8865ec88fa1b31877b361f</id>
<content type='text'>
Allow a system to specify the value of an external sense resistor in the
device tree.

Signed-off-by: Joel Stanley &lt;joel@jms.id.au&gt;
</content>
</entry>
<entry>
<title>hwmon: Add Power8 OCC hwmon driver</title>
<updated>2016-06-03T20:51:51+00:00</updated>
<author>
<name>Yi Li</name>
<email>adamliyi@msn.com</email>
</author>
<published>2016-01-05T04:10:13+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=e2ba27bfcb52d8084bab0f97a4b2e5ece78f7b13'/>
<id>urn:sha1:e2ba27bfcb52d8084bab0f97a4b2e5ece78f7b13</id>
<content type='text'>
Adds a hwmon driver for BMC to monitor Power8 CPU sensors via On Chip
Controller.

Signed-off-by: Yi Li &lt;adamliyi@msn.com&gt;
Signed-off-by: Joel Stanley &lt;joel@jms.id.au&gt;
</content>
</entry>
<entry>
<title>mtd/spi-nor: Add SPI memory controllers for ASPEED AST2400</title>
<updated>2016-06-03T20:51:50+00:00</updated>
<author>
<name>Milton D. Miller II</name>
<email>miltonm@us.ibm.com</email>
</author>
<published>2015-12-09T22:47:10+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=f52f2665de6528a57140e58817deaf1afa6a54da'/>
<id>urn:sha1:f52f2665de6528a57140e58817deaf1afa6a54da</id>
<content type='text'>
This driver adds mtd support for spi-nor attached to either or
both of the Static Memory Controller (new registers) or the SPI
Memory Controller.

The Static Memory Controller is the boot soruce for the SOC.
The controller supports up to 5 chip selects in any combination of
NAND, NOR, and SPI.  The memory controller registers were updated
in the AST2300 and this fmc binding is for the registers in the
new mode.  This driver currently supports only SPI-NOR attached
memory, but has some considerations to support the others later
(including choice of the Kconfig symbol).

There is also a similar register set to support the Static Memory
Controller in a legacy address mode.   That mode is not currently
supported because it is expected that the system will run with the
fmc binding supporting multiple chip selects.

The normal application of the SPI Memory Controller is designated
for use by the host system either for video bios or system bios
and can be accessed over either an LPC bus and/or a PCIe bus or via
a SPI passthough.  The SOC can also access this chip for firmware
updates when not in passthrough mode.  It is expected the passthru
mode and the alternate chip select will be controlled by a future
pinmux driver.

This driver has only been tested with the ast2400 SOC.

mtd: spi-nor: aspeed-smc: Use io string accessors to fifo

Make and use new routines to access the fifo when in user mode.
Instead of using memcpy_fromio, base the new routines on the io
port string accessors.

When the smc controllers are configured to transfer in user mode,
the exact address within the chip select region is ignored and
all valid data bytes are sent to the device fifo.  It has been
determined the reason _memcpy_fromio, an arm specific byte-by-byte
variant of memcpy_fromio was required in read_reg, is that the
later will stutter when coping from memory, discarding some
bytes read, when switching from words to bytes for the final
unaligned length.

This change includes a hack to make inw/outw work.  The default
generic IO_SPACE_LIMIT is 0, and twenty bits when PCI is selected.
While there is a PCMCIA SOC config to select the full 4GB space it
would bring in the PCMCIA core for no use to the ast2400.  We want
to be part of the generic multi-platform arm kernel and therefore
mach/io.h is not going to work.  However, the limit is under an
ifndef, so define it in this file an check it was not redefine
at probe time.  To avoid redefinition errors or warnings, guard
the setting with CONFIG_ARM for cross-arch compile testing and
with a Kconfig dependency for arm cross-compile tests.  While some
other architecture may not accept unsigned long addresses as ioport
cookies, that can be addressed when, if ever, the hardware appears
on another arch.

While the change to use the designed-for-memory optimised copy
template, even reusing the bytes of memcpy, was a recent change
and only for little endian arm, designing and proposing a patch
will take some time and there could be debate if the routine
needs to work on changing memory.

Signed-off-by: Milton Miller &lt;miltonm@us.ibm.com&gt;
Reviewed-by: Andrew Jeffery &lt;andrew@aj.id.au&gt;
Signed-off-by: Joel Stanley &lt;joel@jms.id.au&gt;
</content>
</entry>
<entry>
<title>doc/devicetree: Add Aspeed watchdog timer bindings</title>
<updated>2016-06-03T20:51:37+00:00</updated>
<author>
<name>Joel Stanley</name>
<email>joel@jms.id.au</email>
</author>
<published>2016-05-09T06:13:43+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=cce5e08e0548368432955c2c24c86b2e25c618b7'/>
<id>urn:sha1:cce5e08e0548368432955c2c24c86b2e25c618b7</id>
<content type='text'>
Signed-off-by: Joel Stanley &lt;joel@jms.id.au&gt;
</content>
</entry>
<entry>
<title>doc/devicetree: Add Aspeed VIC bindings</title>
<updated>2016-06-03T20:51:36+00:00</updated>
<author>
<name>Joel Stanley</name>
<email>joel@jms.id.au</email>
</author>
<published>2016-04-13T08:05:55+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=17ff98fe8d1b476e7c05d80d30ae11cc4b164393'/>
<id>urn:sha1:17ff98fe8d1b476e7c05d80d30ae11cc4b164393</id>
<content type='text'>
Signed-off-by: Joel Stanley &lt;joel@jms.id.au&gt;
</content>
</entry>
<entry>
<title>drivers/clocksource/moxart: Add Aspeed support</title>
<updated>2016-06-03T20:51:35+00:00</updated>
<author>
<name>Joel Stanley</name>
<email>joel@jms.id.au</email>
</author>
<published>2016-05-06T06:53:10+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=5c7aa976c59927284acfe737ba76f0ebe1eec217'/>
<id>urn:sha1:5c7aa976c59927284acfe737ba76f0ebe1eec217</id>
<content type='text'>
The Aspeed SoC has timer IP with a very similar register layout to the
moxart timer. This patch adds support for the fourth and fifth gen
aspeed SoCs, and has been tested on the ast2400 and ast2500.

Signed-off-by: Joel Stanley &lt;joel@jms.id.au&gt;
</content>
</entry>
<entry>
<title>Merge tag 'aspeed-for-4.7-dts' of https://github.com/shenki/linux into next/dt</title>
<updated>2016-06-03T20:51:33+00:00</updated>
<author>
<name>Arnd Bergmann</name>
<email>arnd@arndb.de</email>
</author>
<published>2016-05-10T14:08:21+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=6d12638e8816e021f83f5264c8852c143b71b6f1'/>
<id>urn:sha1:6d12638e8816e021f83f5264c8852c143b71b6f1</id>
<content type='text'>
Merge "aspeed devicetree for 4.7" from Joel Stanley:

This device trees for a pair of Aspeed BMC SoCs and the boards that
they sit in.

* tag 'aspeed-for-4.7-dts' of https://github.com/shenki/linux:
  arm/dst: Add Aspeed ast2500 device tree
  arm/dts: Add Aspeed ast2400 device tree
  doc/devicetree: Add Aspeed and Tyan to vendor-prefixes
</content>
</entry>
</feed>
