<feed xmlns='http://www.w3.org/2005/Atom'>
<title>BMC/Intel-BMC/linux.git/Documentation/devicetree, branch dev-4.17</title>
<subtitle>Intel OpenBMC Linux kernel source tree (mirror)</subtitle>
<id>https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev-4.17</id>
<link rel='self' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev-4.17'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/'/>
<updated>2018-08-15T00:05:27+00:00</updated>
<entry>
<title>Merge tag 'v4.17.14' into dev-4.17</title>
<updated>2018-08-15T00:05:27+00:00</updated>
<author>
<name>Joel Stanley</name>
<email>joel@jms.id.au</email>
</author>
<published>2018-08-15T00:04:02+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=4b44547f456a87e8456fe3f4ed2b62ab696249b7'/>
<id>urn:sha1:4b44547f456a87e8456fe3f4ed2b62ab696249b7</id>
<content type='text'>
This is the 4.17.14 stable release

Signed-off-by: Joel Stanley &lt;joel@jms.id.au&gt;
</content>
</entry>
<entry>
<title>net: dsa: qca8k: Add QCA8334 binding documentation</title>
<updated>2018-08-03T05:48:04+00:00</updated>
<author>
<name>Michal Vokáč</name>
<email>vokac.m@gmail.com</email>
</author>
<published>2018-05-23T06:20:18+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=02ccbb263eef5f4487f1af2479c15bfc0b82bff3'/>
<id>urn:sha1:02ccbb263eef5f4487f1af2479c15bfc0b82bff3</id>
<content type='text'>
commit 218bbea11a777c156eb7bcbdc72867b32ae10985 upstream.

Add support for the four-port variant of the Qualcomm QCA833x switch.

The CPU port default link settings can be reconfigured using
a fixed-link sub-node.

Signed-off-by: Michal Vokáč &lt;michal.vokac@ysoft.com&gt;
Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Reviewed-by: Andrew Lunn &lt;andrew@lunn.ch&gt;
Reviewed-by: Florian Fainelli &lt;f.fainelli@gmail.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>dt-bindings: net: meson-dwmac: new compatible name for AXG SoC</title>
<updated>2018-08-03T05:47:57+00:00</updated>
<author>
<name>Yixun Lan</name>
<email>yixun.lan@amlogic.com</email>
</author>
<published>2018-04-28T10:21:10+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=91781a4d00161cd8b4149b9cc81f5f987bb5868f'/>
<id>urn:sha1:91781a4d00161cd8b4149b9cc81f5f987bb5868f</id>
<content type='text'>
[ Upstream commit 7e5d05e18ba1ed491c6f836edee7f0b90f3167bc ]

We need to introduce a new compatible name for the Meson-AXG SoC
in order to support the RMII 100M ethernet PHY, since the PRG_ETH0
register of the dwmac glue layer is changed from previous old SoC.

Signed-off-by: Yixun Lan &lt;yixun.lan@amlogic.com&gt;
Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
Signed-off-by: Sasha Levin &lt;alexander.levin@microsoft.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: pinctrl: meson: add support for the Meson8m2 SoC</title>
<updated>2018-08-03T05:47:56+00:00</updated>
<author>
<name>Martin Blumenstingl</name>
<email>martin.blumenstingl@googlemail.com</email>
</author>
<published>2018-04-22T10:53:28+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=a9dc7f5dd7dd788ed4a020f6c01ec7175014a70c'/>
<id>urn:sha1:a9dc7f5dd7dd788ed4a020f6c01ec7175014a70c</id>
<content type='text'>
[ Upstream commit 03d9fbc39730b3e6b2e7047dc85f0f70de8fb97d ]

The Meson8m2 SoC is a variant of Meson8 with some updates from Meson8b
(such as the Gigabit capable DesignWare MAC).
It is mostly pin compatible with Meson8, only 10 (existing) CBUS pins
get an additional function (four of these are Ethernet RXD2, RXD3, TXD2
and TXD3 which are required when the board uses an RGMII PHY).
The AOBUS pins seem to be identical on Meson8 and Meson8m2.

Signed-off-by: Martin Blumenstingl &lt;martin.blumenstingl@googlemail.com&gt;
Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Reviewed-by: Kevin Hilman &lt;khilman@baylibre.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Signed-off-by: Sasha Levin &lt;alexander.levin@microsoft.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>watchdog: renesas-wdt: Add support for the R8A77965 WDT</title>
<updated>2018-08-03T05:47:47+00:00</updated>
<author>
<name>Wolfram Sang</name>
<email>wsa+renesas@sang-engineering.com</email>
</author>
<published>2018-05-07T12:29:42+00:00</published>
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<id>urn:sha1:7404c0350f984d6f84f6a0593b5ea78bd646d0c5</id>
<content type='text'>
[ Upstream commit b1eb8fedc01499132ced4b2a44b3ab3855c4e681 ]

Document support for the Watchdog Timer (WDT) Controller in the Renesas
R-Car M3-N (R8A77965) SoC. No driver update is needed.

Signed-off-by: Takeshi Kihara &lt;takeshi.kihara.df@renesas.com&gt;
[wsa: rebased to v4.17-rc3]
Signed-off-by: Wolfram Sang &lt;wsa+renesas@sang-engineering.com&gt;
Reviewed-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Reviewed-by: Guenter Roeck &lt;linux@roeck-us.net&gt;
Signed-off-by: Guenter Roeck &lt;linux@roeck-us.net&gt;
Signed-off-by: Wim Van Sebroeck &lt;wim@iguana.be&gt;
Signed-off-by: Sasha Levin &lt;alexander.levin@microsoft.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: fsi: Document binding for the fsi-master-ast-cf "device"</title>
<updated>2018-07-13T00:44:42+00:00</updated>
<author>
<name>Benjamin Herrenschmidt</name>
<email>benh@kernel.crashing.org</email>
</author>
<published>2018-07-12T03:48:43+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=2bb2712af3740f2dd882d115530f5fe87e7c468a'/>
<id>urn:sha1:2bb2712af3740f2dd882d115530f5fe87e7c468a</id>
<content type='text'>
This isn't per-se a real device, it's a pseudo-device that
represents the use of the Aspeed built-in ColdFire to
implement the FSI protocol by bitbanging the GPIOs instead
of doing it from the ARM core.

Thus it's a drop-in replacement for the existing
fsi-master-gpio pseudo-device for use on systems based
on the Aspeed chips. It has most of the same properties,
plus some more needed to operate the coprocessor.

OpenBMC-Staging-Count: 1
Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
Signed-off-by: Joel Stanley &lt;joel@jms.id.au&gt;
</content>
</entry>
<entry>
<title>dt-bindings: misc: ASPEED coprocessor interrupt controller</title>
<updated>2018-06-19T07:39:12+00:00</updated>
<author>
<name>Benjamin Herrenschmidt</name>
<email>benh@kernel.crashing.org</email>
</author>
<published>2018-06-18T04:59:00+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=7d98c401bc3196d0622713a46e808f8491f96d3a'/>
<id>urn:sha1:7d98c401bc3196d0622713a46e808f8491f96d3a</id>
<content type='text'>
Add the device-tree binding definition for the AST2400
and AST2500 coprocessor interrupt controller

OpenBMC-Staging-Count: 1
Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
Signed-off-by: Joel Stanley &lt;joel@jms.id.au&gt;
</content>
</entry>
<entry>
<title>dt-bindings: i2c: Add FSI-attached I2C master dt binding documentation</title>
<updated>2018-06-19T03:05:38+00:00</updated>
<author>
<name>Eddie James</name>
<email>eajames@linux.vnet.ibm.com</email>
</author>
<published>2018-06-13T19:36:13+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=4132c97cc7d5940eb409cf89edda8fe538d5d0dd'/>
<id>urn:sha1:4132c97cc7d5940eb409cf89edda8fe538d5d0dd</id>
<content type='text'>
Document the bindings.

OpenBMC-Staging-Count: 3
Signed-off-by: Eddie James &lt;eajames@linux.vnet.ibm.com&gt;&gt;
Acked-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Joel Stanley &lt;joel@jms.id.au&gt;
</content>
</entry>
<entry>
<title>ARM: dts: aspeed: Add Portwell Neptune machine</title>
<updated>2018-06-19T03:05:38+00:00</updated>
<author>
<name>Amithash Prasad</name>
<email>amithash@fb.com</email>
</author>
<published>2018-03-27T00:11:49+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=f5e599d59ac9dbd72b0d3caedc05a3d3bd957314'/>
<id>urn:sha1:f5e599d59ac9dbd72b0d3caedc05a3d3bd957314</id>
<content type='text'>
Initial introduction of Portwell Neptune family equipped with
Aspeed 2500 BMC SoC. Neptune is a x86 server development kit with a
ASPEED ast2500 BMC manufactured by Portwell. Specifically, This
adds the neptune platform device tree file including the flash
layout used by the neptune machines.

Signed-off-by: Amithash Prasad &lt;amithash@fb.com&gt;
Acked-by: Andrew Jeffery &lt;andrew@aj.id.au&gt;
Signed-off-by: Joel Stanley &lt;joel@jms.id.au&gt;
</content>
</entry>
<entry>
<title>dt-bindings: hwmon: pmbus: Add Maxim MAX31785 documentation</title>
<updated>2018-06-19T03:05:38+00:00</updated>
<author>
<name>Andrew Jeffery</name>
<email>andrew@aj.id.au</email>
</author>
<published>2018-04-03T14:26:51+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=dfc9765c5810f6911727d88433cddc870c2748c2'/>
<id>urn:sha1:dfc9765c5810f6911727d88433cddc870c2748c2</id>
<content type='text'>
OpenBMC-Staging-Count: 3
Signed-off-by: Andrew Jeffery &lt;andrew@aj.id.au&gt;
</content>
</entry>
</feed>
