Intel OpenBMC Linux kernel source tree (mirror) https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev-5.2 2019-08-22T04:55:20+00:00 2019-08-22T04:55:20+00:00 Andrew Jeffery andrew@aj.id.au 2019-08-07T00:36:28+00:00 urn:sha1:afc2a76d7408bb442ad817a92c629dfb9cde8e2e The ASPEED SD/SDIO/MMC controller exposes two slots implementing the SDIO Host Specification v2.00, with 1 or 4 bit data buses, or an 8 bit data bus if only a single slot is enabled. OpenBMC-Staging-Count: 1 Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au> 2019-05-16T15:38:17+00:00 Linus Torvalds torvalds@linux-foundation.org 2019-05-16T15:38:17+00:00 urn:sha1:e8a1d70117116c8d96c266f0b99e931717670eaf Pull ARM Device-tree updates from Olof Johansson: "Besides new bindings and additional descriptions of hardware blocks for various SoCs and boards, the main new contents here is: SoCs: - Intel Agilex (SoCFPGA) - NXP i.MX8MM (Quad Cortex-A53 with media/graphics focus) New boards: - Allwinner: + RerVision H3-DVK (H3) + Oceanic 5205 5inMFD (H6) + Beelink GS2 (H6) + Orange Pi 3 (H6) - Rockchip: + Orange Pi RK3399 + Nanopi NEO4 + Veyron-Mighty Chromebook variant - Amlogic: + SEI Robotics SEI510 - ST Micro: + stm32mp157a discovery1 + stm32mp157c discovery2 - NXP: + Eckelmann ci4x10 (i.MX6DL) + i.MX8MM EVK (i.MX8MM) + ZII i.MX7 RPU2 (i.MX7) + ZII SPB4 (VF610) + Zii Ultra (i.MX8M) + TQ TQMa7S (i.MX7Solo) + TQ TQMa7D (i.MX7Dual) + Kobo Aura (i.MX50) + Menlosystems M53 (i.MX53)j - Nvidia: + Jetson Nano (Tegra T210)" * tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (593 commits) arm64: dts: bitmain: Add UART pinctrl support for Sophon Edge arm64: dts: bitmain: Add pinctrl support for BM1880 SoC arm64: dts: bitmain: Add GPIO Line names for Sophon Edge board arm64: dts: bitmain: Add GPIO support for BM1880 SoC ARM: dts: gemini: Indent DIR-685 partition table dt-bindings: hwmon (pwm-fan) Remove dead "cooling-*-state" properties ARM: dts: qcom-apq8064: Set 'cxo_board' as ref clock of the DSI PHY arm64: dts: msm8998: thermal: Restrict thermal zone name length to under 20 arm64: dts: msm8998: thermal: Fix number of supported sensors arm64: dts: msm8998-mtp: thermal: Remove skin and battery thermal zones arm64: dts: exynos: Move fixed-clocks out of soc arm64: dts: exynos: Move pmu and timer nodes out of soc ARM: dts: s5pv210: Fix camera clock provider on Goni board ARM: dts: exynos: Properly override node to use MDMA0 on Universal C210 ARM: dts: exynos: Move fixed-clocks out of soc on Exynos3250 ARM: dts: exynos: Remove unneeded address/size cells from fixed-clock on Exynos3250 ARM: dts: exynos: Move pmu and timer nodes out of soc arm64: dts: rockchip: fix IO domain voltage setting of APIO5 on rockpro64 arm64: dts: db820c: Add sound card support arm64: dts: apq8096-db820c: Add HDMI display support ... 2019-05-06T10:33:03+00:00 Yinbo Zhu yinbo.zhu@nxp.com 2019-05-05T05:57:24+00:00 urn:sha1:343682173846c68f231929a5b84584ab7a845a0b Add "fsl,ls1028a-esdhc" bindings for ls1028a eSDHC host controller Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> 2019-05-06T10:33:03+00:00 NeilBrown neil@brown.name 2019-05-04T10:24:56+00:00 urn:sha1:afb7c7910bf3c42b56f99c9d6bb82099d0a0794d mt7620 family MIPS SOCs contain the mtk-sd silicon. Add support for this. Signed-off-by: NeilBrown <neil@brown.name> Reviewed-by: Chaotian Jing <chaotian.jing@mediatek.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> 2019-05-06T10:33:03+00:00 Fabien Parent fparent@baylibre.com 2019-03-23T21:15:56+00:00 urn:sha1:e57112e35c60a847914c75e5163db0f4ba078091 Add binding documentation of mtk-sd for MT8516 SoCs. Signed-off-by: Fabien Parent <fparent@baylibre.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> 2019-05-06T09:55:39+00:00 BOUGH CHEN haibo.chen@nxp.com 2019-04-29T08:55:32+00:00 urn:sha1:d3db80ca5744b5635554dd6171ecb8f3c3a5fd71 Add imx7ulp compatible string. Signed-off-by: Haibo Chen <haibo.chen@nxp.com> Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> 2019-04-15T09:55:54+00:00 Christoph Muellner christoph.muellner@theobroma-systems.com 2019-03-22T11:38:04+00:00 urn:sha1:28f22fb755ecf9f933f045bc0afdb8140641b01c Add disable-cqe-dcmd as optional property for MMC hosts. This property allows to disable or not enable the direct command features of the command queue engine. Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Fixes: 84362d79f436 ("mmc: sdhci-of-arasan: Add CQHCI support for arasan,sdhci-5.1") Cc: stable@vger.kernel.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> 2019-04-15T09:55:54+00:00 Sowjanya Komatineni skomatineni@nvidia.com 2019-03-24T04:45:21+00:00 urn:sha1:ad64a7908c0a4f0712dc518e573054e2ade3aed6 SDHCI controller of Tegra194 is similar to SDHCI controller in Tegra186. This patch documents Tegra194 sdhci compatible string. Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> 2019-04-08T14:49:21+00:00 Manivannan Sadhasivam manivannan.sadhasivam@linaro.org 2019-02-28T15:45:09+00:00 urn:sha1:8aa576a8ee1ba1f76785ed3cd12de20121971854 HI3670 SoC is architecturally same as the HI3660 SoC. Hence, the same K3 specific designware driver is reused for HI3670 SoC and the binding is documented with fallback approach for compatible property. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com> 2019-02-25T07:40:58+00:00 Sowjanya Komatineni skomatineni@nvidia.com 2019-01-23T19:30:51+00:00 urn:sha1:c7fddbd5db5cffd10ed4d18efa20e36803d1899f Add supports-cqe optional property for MMC hosts. This property is used to identify the specific host controller supporting command queue. Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>