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<title>BMC/Intel-BMC/linux.git/Documentation/devicetree/bindings/mmc, branch dev-4.4</title>
<subtitle>Intel OpenBMC Linux kernel source tree (mirror)</subtitle>
<id>https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev-4.4</id>
<link rel='self' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev-4.4'/>
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<updated>2015-11-06T20:17:09+00:00</updated>
<entry>
<title>Merge tag 'devicetree-for-4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux</title>
<updated>2015-11-06T20:17:09+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2015-11-06T20:17:09+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=9bbd4b9f38f56b4ee2c8ff268a1104ff38333e90'/>
<id>urn:sha1:9bbd4b9f38f56b4ee2c8ff268a1104ff38333e90</id>
<content type='text'>
Pull DeviceTree updates from Rob Herring:
 "A fairly large (by DT standards) pull request this time with the
  majority being some overdue moving DT binding docs around to
  consolidate similar bindings.

   - DT binding doc consolidation moving similar bindings to common
     locations.  The majority of these are display related which were
     scattered in video/, fb/, drm/, gpu/, and panel/ directories.

   - Add new config option, CONFIG_OF_ALL_DTBS, to enable building all
     dtbs in the tree for most arches with dts files (except powerpc for
     now).

   - OF_IRQ=n fixes for user enabled CONFIG_OF.

   - of_node_put ref counting fixes from Julia Lawall.

   - Common DT binding for wakeup-source and deprecation of all similar
     bindings.

   - DT binding for PXA LCD controller.

   - Allow ignoring failed PCI resource translations in order to ignore
     64-bit addresses on non-LPAE 32-bit kernels.

   - Support setting the NUMA node from DT instead of only from parent
     device.

   - Couple of earlycon DT parsing fixes for address and options"

* tag 'devicetree-for-4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (45 commits)
  MAINTAINERS: update DT binding doc locations
  devicetree: add Sigma Designs vendor prefix
  of: simplify arch_find_n_match_cpu_physical_id() function
  Documentation: arm: Fixed typo in socfpga fpga mgr example
  Documentation: devicetree: fix reference to legacy wakeup properties
  Documentation: devicetree: standardize/consolidate on "wakeup-source" property
  drivers: of: removing assignment of 0 to static variable
  xtensa: enable building of all dtbs
  mips: enable building of all dtbs
  metag: enable building of all dtbs
  metag: use common make variables for dtb builds
  h8300: enable building of all dtbs
  arm64: enable building of all dtbs
  arm: enable building of all dtbs
  arc: enable building of all dtbs
  arc: use common make variables for dtb builds
  of: add config option to enable building of all dtbs
  of/fdt: fix error checking for earlycon address
  of/overlay: add missing of_node_put
  of/platform: add missing of_node_put
  ...
</content>
</entry>
<entry>
<title>Documentation: devicetree: fix reference to legacy wakeup properties</title>
<updated>2015-10-30T18:04:19+00:00</updated>
<author>
<name>Sudeep Holla</name>
<email>sudeep.holla@arm.com</email>
</author>
<published>2015-10-21T10:09:59+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=71a0151c5c82595b58c21b4dd5c07482d8a3d554'/>
<id>urn:sha1:71a0151c5c82595b58c21b4dd5c07482d8a3d554</id>
<content type='text'>
This patch marks all the reference to the legacy wakeup bindings
and replaces them with the standard "wakeup-source" property.

All these legacy property are also listed under a separate section in
the generic wakeup-source binding document.

Cc: Rob Herring &lt;robh+dt@kernel.org&gt;
Cc: Pawel Moll &lt;pawel.moll@arm.com&gt;
Cc: Mark Rutland &lt;mark.rutland@arm.com&gt;
Cc: Ian Campbell &lt;ijc+devicetree@hellion.org.uk&gt;
Signed-off-by: Sudeep Holla &lt;sudeep.holla@arm.com&gt;
Signed-off-by: Rob Herring &lt;robh@kernel.org&gt;
</content>
</entry>
<entry>
<title>mmc: dt-bindings: update Mediatek MMC bindings</title>
<updated>2015-10-27T09:21:15+00:00</updated>
<author>
<name>Chaotian Jing</name>
<email>chaotian.jing@mediatek.com</email>
</author>
<published>2015-10-27T06:24:22+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=2c21d26825d5c1fda1729541d5fad56ee7ef7fa2'/>
<id>urn:sha1:2c21d26825d5c1fda1729541d5fad56ee7ef7fa2</id>
<content type='text'>
Add 400Mhz clock source for HS400 mode

Signed-off-by: Chaotian Jing &lt;chaotian.jing@mediatek.com&gt;
Signed-off-by: Ulf Hansson &lt;ulf.hansson@linaro.org&gt;
</content>
</entry>
<entry>
<title>mmc: core: Add DT bindings for eMMC hardware reset support</title>
<updated>2015-10-27T09:21:15+00:00</updated>
<author>
<name>Chaotian Jing</name>
<email>chaotian.jing@mediatek.com</email>
</author>
<published>2015-10-27T06:24:21+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=794f15782d9f12aa5a43f796680a5fc4f2c424e3'/>
<id>urn:sha1:794f15782d9f12aa5a43f796680a5fc4f2c424e3</id>
<content type='text'>
Sometime only need set MMC_CAP_HW_RESET for one of MMC hosts,
So set it in device tree is better.

Signed-off-by: Chaotian Jing &lt;chaotian.jing@mediatek.com&gt;
Signed-off-by: Ulf Hansson &lt;ulf.hansson@linaro.org&gt;
</content>
</entry>
<entry>
<title>Documentation: synopsys-dw-mshc: add bindings for idmac and edmac</title>
<updated>2015-10-26T15:00:16+00:00</updated>
<author>
<name>Shawn Lin</name>
<email>shawn.lin@rock-chips.com</email>
</author>
<published>2015-09-16T06:41:50+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=87ffa7d30d0be24f4bcf08005f145903c5ef55b7'/>
<id>urn:sha1:87ffa7d30d0be24f4bcf08005f145903c5ef55b7</id>
<content type='text'>
synopsys-dw-mshc supports three types of transfer mode. We add
bindings and description for how to use them at runtime.

Signed-off-by: Shawn Lin &lt;shawn.lin@rock-chips.com&gt;
Signed-off-by: Jaehoon Chung &lt;jh80.chung@samsung.com&gt;
Signed-off-by: Ulf Hansson &lt;ulf.hansson@linaro.org&gt;
</content>
</entry>
<entry>
<title>DT: mmc: sh_mmcif: document R8A7794 support</title>
<updated>2015-10-26T15:00:15+00:00</updated>
<author>
<name>Sergei Shtylyov</name>
<email>sergei.shtylyov@cogentembedded.com</email>
</author>
<published>2015-10-15T22:40:16+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=a599579ee8e32daebdfa4d97b24389c680ef5789'/>
<id>urn:sha1:a599579ee8e32daebdfa4d97b24389c680ef5789</id>
<content type='text'>
Renesas R8A7794 SoC also has the MMCIF controller.

Signed-off-by: Sergei Shtylyov &lt;sergei.shtylyov@cogentembedded.com&gt;
Acked-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Signed-off-by: Ulf Hansson &lt;ulf.hansson@linaro.org&gt;
</content>
</entry>
<entry>
<title>DT: mmc: sh_mmcif: fix "compatible" property text</title>
<updated>2015-10-26T15:00:14+00:00</updated>
<author>
<name>Sergei Shtylyov</name>
<email>sergei.shtylyov@cogentembedded.com</email>
</author>
<published>2015-10-15T22:39:39+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=76d63c2b59d4a1481bedc65a3ef25e9d1354dca3'/>
<id>urn:sha1:76d63c2b59d4a1481bedc65a3ef25e9d1354dca3</id>
<content type='text'>
The "compatible" property text contradicts even the example given in the MMCIF
binding document itself;  moreover, the Renesas MMCIF driver only matches  on
the generic "compatible" string and doesn't look for the SoC specific strings
at all. Thus describe "renesas,sh-mmcif" as a fallback value.

Fixes: b4c27763d749 ("mmc: sh_mmcif: Document DT bindings")
Signed-off-by: Sergei Shtylyov &lt;sergei.shtylyov@cogentembedded.com&gt;
Acked-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Signed-off-by: Ulf Hansson &lt;ulf.hansson@linaro.org&gt;
</content>
</entry>
<entry>
<title>mmc: dw_mmc-rockchip: dt-binding: Add tuning related things</title>
<updated>2015-10-26T15:00:11+00:00</updated>
<author>
<name>Alexandru M Stan</name>
<email>amstan@chromium.org</email>
</author>
<published>2015-10-12T12:48:27+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=f8085bbada3b124b5b39b61bb1a7a0a78c24604b'/>
<id>urn:sha1:f8085bbada3b124b5b39b61bb1a7a0a78c24604b</id>
<content type='text'>
Add ciu_drive, ciu_sample clocks and default-sample-phase. This will later
be used by tuning code.

We do not touch ciu_drive (and by extension define default-drive-phase).
Drive phase is mostly used to define minimum hold times, while one could
write some code to determine what phase meets the minimum hold time
(ex 10 degrees) this will not work with the current clock phase framework
(which floors angles, so we'll get 0 deg, and there's no way to know what
resolution the floors happen at). We assume that the default drive angles
set by the hardware are good enough.

Signed-off-by: Alexandru M Stan &lt;amstan@chromium.org&gt;
Signed-off-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
Acked-by: Jaehoon Chung &lt;jh80.chung@samsung.com&gt;
Signed-off-by: Ulf Hansson &lt;ulf.hansson@linaro.org&gt;
</content>
</entry>
<entry>
<title>mmc: dt: add DT binding for little-endian eSDHC host controller</title>
<updated>2015-10-26T15:00:07+00:00</updated>
<author>
<name>yangbo lu</name>
<email>yangbo.lu@freescale.com</email>
</author>
<published>2015-10-08T10:36:23+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=e38eeca5c23389f9a606e4847f0f9731b2e889f2'/>
<id>urn:sha1:e38eeca5c23389f9a606e4847f0f9731b2e889f2</id>
<content type='text'>
Signed-off-by: Yangbo Lu &lt;yangbo.lu@freescale.com&gt;
Signed-off-by: Ulf Hansson &lt;ulf.hansson@linaro.org&gt;
</content>
</entry>
<entry>
<title>mmc: sdhci-of-arasan: Add the support for sdhci-5.1</title>
<updated>2015-08-27T12:50:54+00:00</updated>
<author>
<name>Shawn Lin</name>
<email>shawn.lin@rock-chips.com</email>
</author>
<published>2015-08-11T07:57:05+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=da795ec26e2542f1e306598a1d7a31c0762f2bd7'/>
<id>urn:sha1:da795ec26e2542f1e306598a1d7a31c0762f2bd7</id>
<content type='text'>
This patch adds the compatible string in sdhci-of-arasan.c to
support sdhci-arasan5.1 version of controller. No documented
controller IP version is found in the TRM, so we use ths version
of command queueing engine integrated into this controller by arasan
to specify our controller.

Signed-off-by: Shawn Lin &lt;shawn.lin@rock-chips.com&gt;
Acked-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
Signed-off-by: Ulf Hansson &lt;ulf.hansson@linaro.org&gt;
</content>
</entry>
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