BMC/Intel-BMC/linux.git/Documentation/core-api/cachetlb.rst, branch dev-5.3Intel OpenBMC Linux kernel source tree (mirror)https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev-5.32019-04-03T08:33:04+00:00ia64/tlb: Eradicate tlb_migrate_finish() callback2019-04-03T08:33:04+00:00Peter Zijlstrapeterz@infradead.org2019-02-19T13:38:37+00:00urn:sha1:6455959819bf2469190ae9f6b4ccebaa9827e884
Only ia64-sn2 uses this as an optimization, and there it is of
questionable correctness due to the mm_users==1 test.
Remove it entirely.
No change in behavior intended.
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Andy Lutomirski <luto@kernel.org>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Dave Hansen <dave.hansen@linux.intel.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Rik van Riel <riel@surriel.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
docs: core-api: add cachetlb documentation2018-05-08T16:02:34+00:00Mauro Carvalho Chehabmchehab+samsung@kernel.org2018-05-07T09:35:41+00:00urn:sha1:de0f51e4b1391145e47d6aa60681dab091bcc777
The cachetlb.txt is already in ReST format. So, move it to the
core-api guide, where it belongs.
Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
Signed-off-by: Jonathan Corbet <corbet@lwn.net>