<feed xmlns='http://www.w3.org/2005/Atom'>
<title>BMC/Intel-BMC/linux.git, branch dev-5.14-intel</title>
<subtitle>Intel OpenBMC Linux kernel source tree (mirror)</subtitle>
<id>https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev-5.14-intel</id>
<link rel='self' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev-5.14-intel'/>
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<updated>2021-10-28T12:34:02+00:00</updated>
<entry>
<title>i3c: master: dw: Remove IBI_WIP code</title>
<updated>2021-10-28T12:34:02+00:00</updated>
<author>
<name>Oleksandr Shulzhenko</name>
<email>oleksandr.shulzhenko.viktorovych@intel.com</email>
</author>
<published>2021-09-14T08:29:00+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=34569b11be8e3e7009e5647ceeeb9228982d76ac'/>
<id>urn:sha1:34569b11be8e3e7009e5647ceeeb9228982d76ac</id>
<content type='text'>
The IBI_WIP code is not used and not expected to be used in the future.
Remove it.

Change-Id: I6a3808c3808ab827c3ac326dbf1be244beffd6f6
Signed-off-by: Oleksandr Shulzhenko &lt;oleksandr.shulzhenko.viktorovych@intel.com&gt;
</content>
</entry>
<entry>
<title>hwmon: (peci) add invalid reading filtering logic</title>
<updated>2021-10-27T21:37:48+00:00</updated>
<author>
<name>Jae Hyun Yoo</name>
<email>jae.hyun.yoo@linux.intel.com</email>
</author>
<published>2021-10-21T21:08:58+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=fa9aaca01cecd4286b54dd2b96ce82ac89c54354'/>
<id>urn:sha1:fa9aaca01cecd4286b54dd2b96ce82ac89c54354</id>
<content type='text'>
CPU can return invalid temperature readings prior to BIOS-PCU
handshake RST_CPL3 or RST_CPL4 completion so add a fix to filter
the invalid readings out.

Signed-off-by: Jae Hyun Yoo &lt;jae.hyun.yoo@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>arm: dts: add vref and battery sensing properties into ADC nodes</title>
<updated>2021-10-27T21:37:39+00:00</updated>
<author>
<name>Jae Hyun Yoo</name>
<email>jae.hyun.yoo@intel.com</email>
</author>
<published>2021-09-30T00:24:23+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=837535351698d45c135cdcc0676f304773adac7b'/>
<id>urn:sha1:837535351698d45c135cdcc0676f304773adac7b</id>
<content type='text'>
This commit adds 'aspeed,int-vref-microvolt' and
'aspeed,battery-sensing' properties into ADC nodes for Intel
AST2600 BMC platforms.

Signed-off-by: Jae Hyun Yoo &lt;jae.hyun.yoo@intel.com&gt;
</content>
</entry>
<entry>
<title>ARM: dts: add rtc-pch node into aspeed-bmc-intel-ast2xxx</title>
<updated>2021-10-27T21:37:14+00:00</updated>
<author>
<name>Jae Hyun Yoo</name>
<email>jae.hyun.yoo@intel.com</email>
</author>
<published>2021-07-30T21:17:24+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=db91624c3f1047df274b1ab09739260bb64266a9'/>
<id>urn:sha1:db91624c3f1047df274b1ab09739260bb64266a9</id>
<content type='text'>
This commit adds rtc-pch node into aspeed-bmc-intel-ast2500 and
aspeed-bmc-intel-ast2600 to enable PCH RTC driver.

Signed-off-by: Jae Hyun Yoo &lt;jae.hyun.yoo@intel.com&gt;
</content>
</entry>
<entry>
<title>vegman: kernel: add RTC driver for PCHC620</title>
<updated>2021-10-27T21:37:05+00:00</updated>
<author>
<name>Ivan Mikhaylov</name>
<email>i.mikhaylov@yadro.com</email>
</author>
<published>2021-07-12T07:46:22+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=a8b6e881e9ea363bd05590e6e58d31085e40c802'/>
<id>urn:sha1:a8b6e881e9ea363bd05590e6e58d31085e40c802</id>
<content type='text'>
Signed-off-by: Ivan Mikhaylov &lt;i.mikhaylov@yadro.com&gt;
</content>
</entry>
<entry>
<title>peci: Add debug printing to check caller PID</title>
<updated>2021-10-27T21:35:49+00:00</updated>
<author>
<name>Jae Hyun Yoo</name>
<email>jae.hyun.yoo@intel.com</email>
</author>
<published>2021-02-04T00:18:37+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=551692a3d6e4acad61e20848dfbbd4544a8eb5ec'/>
<id>urn:sha1:551692a3d6e4acad61e20848dfbbd4544a8eb5ec</id>
<content type='text'>
This commit adds debug printing out to check caller PID for traffic
profiling.

The printing can be enabled by this command:
echo -n 'file drivers/peci/peci-core.c line 218 +p' &gt; /sys/kernel/debug/dynamic_debug/control
echo '8' &gt; /proc/sys/kernel/printk

Signed-off-by: Jae Hyun Yoo &lt;jae.hyun.yoo@intel.com&gt;
</content>
</entry>
<entry>
<title>soc: aspeed: mctp: fix a build break</title>
<updated>2021-10-19T22:10:40+00:00</updated>
<author>
<name>Jae Hyun Yoo</name>
<email>jae.hyun.yoo@linux.intel.com</email>
</author>
<published>2021-10-02T02:22:15+00:00</published>
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<id>urn:sha1:5961fe1c6410a03315731cb88260e85cb4fbd3c7</id>
<content type='text'>
This commit fixes a build break which is caused by an incompatible
compare function parameter of list_sort() call.

Signed-off-by: Jae Hyun Yoo &lt;jae.hyun.yoo@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>ASD Add Shift IR/DR from Exit IR/DR for HW2 JTAG xfers</title>
<updated>2021-10-19T22:10:40+00:00</updated>
<author>
<name>Ernesto Corona</name>
<email>ernesto.corona@intel.com</email>
</author>
<published>2021-09-30T21:15:58+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=637a70a43a51df6276aec12d6df6b7311d4c30de'/>
<id>urn:sha1:637a70a43a51df6276aec12d6df6b7311d4c30de</id>
<content type='text'>
Before this change JTAG HW2 mode shift operation failed to process a
shift request when current state was Exit IR/DR for the same type of
xfer SHIFTIR/SHIFTDR respectively. After this change we will
support shift operations in HW2 mode from the following jtag states:

For SHIFTDR: JTAG_STATE_SHIFTDR, JTAG_STATE_IDLE, JTAG_STATE_TLRESET,
             JTAG_STATE_PAUSEDR, JTAG_STATE_EXIT1DR and
             JTAG_STATE_EXIT1IR

For SHIFTIR: JTAG_STATE_SHIFTIR, JTAG_STATE_IDLE, JTAG_STATE_TLRESET,
             JTAG_STATE_PAUSEIR, JTAG_STATE_EXIT1IR and
             JTAG_STATE_EXIT1DR

Test:
ASD Sanity(SW mode) finished successfully(SPR)
ASD Sanity(HW mode) finished successfully(SPR)
Cscripts(SW mode) finished successfully(SPR)
Cscripts(HW mode) finished successfully(SPR)

Signed-off-by: Ernesto Corona &lt;ernesto.corona@intel.com&gt;
Change-Id: Ide878b8986639c63e41c2bc360e06a261cdffee5
</content>
</entry>
<entry>
<title>gpio: gpio-aspeed-sgpio: Fix wrong hwirq in irq handler.</title>
<updated>2021-10-19T22:10:40+00:00</updated>
<author>
<name>Steven Lee</name>
<email>steven_lee@aspeedtech.com</email>
</author>
<published>2021-09-07T09:55:25+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=035b6967edb65346ac1a23ae338eee77d301e29c'/>
<id>urn:sha1:035b6967edb65346ac1a23ae338eee77d301e29c</id>
<content type='text'>
The current hwirq is calculated based on the old GPIO pin order(input
GPIO range is from 0 to ngpios - 1).
It should be calculated based on the current GPIO input pin order(input
GPIOs are 0, 2, 4, ..., (ngpios - 1) * 2).

Signed-off-by: Steven Lee &lt;steven_lee@aspeedtech.com&gt;
</content>
</entry>
<entry>
<title>gpio: gpio-aspeed-sgpio: Return error if ngpios is not multiple of 8.</title>
<updated>2021-10-19T22:10:40+00:00</updated>
<author>
<name>Steven Lee</name>
<email>steven_lee@aspeedtech.com</email>
</author>
<published>2021-07-12T10:03:16+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=5d0476de3fbcc8d01f25c65633af0f16f6d930ec'/>
<id>urn:sha1:5d0476de3fbcc8d01f25c65633af0f16f6d930ec</id>
<content type='text'>
Add an else-if condition in the probe function to check whether ngpios is
multiple of 8.
Per AST datasheet, numbers of available serial GPIO pins in Serial GPIO
Configuration Register must be n bytes. For instance, if n = 1, it means
AST SoC supports 8 GPIO pins.

Signed-off-by: Steven Lee &lt;steven_lee@aspeedtech.com&gt;
Reviewed-by: Andrew Jeffery &lt;andrew@aj.id.au&gt;
Reviewed-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Signed-off-by: Bartosz Golaszewski &lt;bgolaszewski@baylibre.com&gt;
</content>
</entry>
</feed>
